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Opened 9 years ago

Closed 9 years ago

Last modified 4 years ago

#4277 closed defect (worksforme)

typo in drivers/ssb/driver_extif.c

Reported by: anonymous Owned by: developers
Priority: normal Milestone: Barrier Breaker 14.07
Component: kernel Version:
Keywords: Cc: vanekt@…

Description

External interface timing is set instead of flash interface.

--- linux-2.6.25.20/drivers/ssb/driver_extif.c	2008-11-10 19:50:34.000000000 +0100
+++ linux-2.6.25.20.mod/drivers/ssb/driver_extif.c	2008-12-01 14:06:36.000000000 +0100
@@ -91,10 +96,10 @@
 	extif_write32(extif, SSB_EXTIF_PROG_CFG, SSB_EXTCFG_EN);
 
 	/* Set timing for the flash */
-	tmp  = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;
-	tmp |= DIV_ROUND_UP(40, ns) << SSB_PROG_WCNT_1_SHIFT;
+	tmp  = DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_3_SHIFT;
+	tmp |= DIV_ROUND_UP(40, ns) << SSB_FLASH_WCNT_1_SHIFT;
 	tmp |= DIV_ROUND_UP(120, ns);
-	extif_write32(extif, SSB_EXTIF_PROG_WAITCNT, tmp);
+	extif_write32(extif, SSB_EXTIF_FLASH_WAITCNT, tmp);
 
 	/* Set programmable interface timing for external uart */
 	tmp  = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;

Attachments (0)

Change History (5)

comment:1 Changed 9 years ago by anonymous

hi,

extif flash_waitcount doesn't appear on broadcom source code.

		/* Set timing for the flash */
		tmp = CEIL(10, ns) << FW_W3_SHIFT;	/* W3 = 10nS */
		tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
		tmp = tmp | CEIL(120, ns);		/* W0 = 120nS */
		W_REG(&eir->prog_waitcount, tmp);	/* 0x01020a0c for a 100Mhz clock */

		/* Set programmable interface timing for external uart */
		tmp = CEIL(10, ns) << FW_W3_SHIFT;	/* W3 = 10nS */
		tmp = tmp | (CEIL(20, ns) << FW_W2_SHIFT); /* W2 = 20nS */
		tmp = tmp | (CEIL(100, ns) << FW_W1_SHIFT); /* W1 = 100nS */
		tmp = tmp | CEIL(120, ns);		/* W0 = 120nS */
		W_REG(&eir->prog_waitcount, tmp);	/* 0x01020a0c for a 100Mhz clock */

other is for chipcommon:

	} else if ((cc = sb_setcore(sbh, SB_CC, 0))) {
		/* Set timing for the flash */
		tmp = CEIL(10, ns) << FW_W3_SHIFT;	/* W3 = 10nS */
		tmp |= CEIL(10, ns) << FW_W1_SHIFT;	/* W1 = 10nS */
		tmp |= CEIL(120, ns);			/* W0 = 120nS */
		if (sb_corerev(sbh) < 9)  
			W_REG(&cc->flash_waitcount, tmp);
	
		if ( (sb_corerev(sbh) < 9) || 
		     ((BCMINIT(sb_chip)(sbh) == BCM5350_DEVICE_ID) && BCMINIT(sb_chiprev)(sbh) == 0) ) {
			W_REG(&cc->pcmcia_memwait, tmp);
		}

bye

comment:2 Changed 9 years ago by anonymous

The first part of broadcom source has the same typo:

/* Set timing for the flash */
		tmp = CEIL(10, ns) << FW_W3_SHIFT;	/* W3 = 10nS */
		tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
		tmp = tmp | CEIL(120, ns);		/* W0 = 120nS */
		W_REG(&eir->prog_waitcount, tmp);	/* 0x01020a0c for a 100Mhz clock */

Comment reads "flash" but flash timing is in eir->flash_waitcount - same as SSB_EXTIF_FLASH_WAITCNT in 2.6.

As matter of fact there is no point to set flash timing again - if kernel is running, the boot surely have set flash timing correctly (maybe not the fastest one). On wl500g PMON sets SSB_EXTIF_FLASH_WAITCNT to 0x0200050f, the same value we get here for 125MHz clock.

comment:3 Changed 9 years ago by florian

  • Resolution set to worksforme
  • Status changed from new to closed

comment:4 Changed 9 years ago by anonymous

Hmm, I thought that this is so obvious copy&paste typo...
It worked always anyway.

comment:5 Changed 4 years ago by jow

  • Milestone changed from Attitude Adjustment 12.09 to Barrier Breaker 14.07

Milestone Attitude Adjustment 12.09 deleted

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