Changeset 47807


Ignore:
Timestamp:
2015-12-07T20:20:40+01:00 (2 years ago)
Author:
rmilecki
Message:

bcm53xx: use backported BCM5301X patches from stblinux soc/next

Signed-off-by: Rafał Miłecki <zajec5@…>

Location:
trunk/target/linux/bcm53xx/patches-4.4
Files:
3 moved

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/bcm53xx/patches-4.4/022-ARM-BCM-Clean-up-SMP-support-for-Broadcom-Kona.patch

    r47806 r47807  
    1 From 8622d6da5d95293d474c156612fd819fdaf542ec Mon Sep 17 00:00:00 2001 
     1From b5989f783de046577067fe356b1bb76cae07e867 Mon Sep 17 00:00:00 2001 
    22From: Kapil Hali <kapilh@broadcom.com> 
    3 Date: Wed, 25 Nov 2015 08:58:53 -0500 
    4 Subject: [PATCH 131/134] ARM: BCM: Clean up SMP support for Broadcom Kona 
     3Date: Sat, 5 Dec 2015 06:53:41 -0500 
     4Subject: [PATCH] ARM: BCM: Clean up SMP support for Broadcom Kona 
    55 
    66These changes cleans up SMP implementaion for Broadcom's 
     
    99 
    1010Signed-off-by: Kapil Hali <kapilh@broadcom.com> 
     11Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> 
    1112--- 
    12  arch/arm/boot/dts/bcm11351.dtsi |  2 +- 
    13  arch/arm/boot/dts/bcm21664.dtsi |  2 +- 
    14  arch/arm/mach-bcm/kona_smp.c    | 82 +++++++++++++++++++++++++++-------------- 
    15  3 files changed, 56 insertions(+), 30 deletions(-) 
     13 .../bindings/arm/bcm/brcm,bcm11351-cpu-method.txt  | 12 ++-- 
     14 arch/arm/boot/dts/bcm11351.dtsi                    |  4 +- 
     15 arch/arm/boot/dts/bcm21664.dtsi                    |  4 +- 
     16 arch/arm/mach-bcm/kona_smp.c                       | 82 ++++++++++++++-------- 
     17 4 files changed, 64 insertions(+), 38 deletions(-) 
    1618 
     19--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt 
     20+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt 
     21@@ -1,17 +1,17 @@ 
     22 Broadcom Kona Family CPU Enable Method 
     23 -------------------------------------- 
     24 This binding defines the enable method used for starting secondary 
     25-CPUs in the following Broadcom SoCs: 
     26+CPU in the following Broadcom SoCs: 
     27   BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664 
     28  
     29 The enable method is specified by defining the following required 
     30-properties in the "cpus" device tree node: 
     31+properties in the corresponding secondary "cpu" device tree node: 
     32   - enable-method = "brcm,bcm11351-cpu-method"; 
     33   - secondary-boot-reg = <...>; 
     34  
     35 The secondary-boot-reg property is a u32 value that specifies the 
     36-physical address of the register used to request the ROM holding pen 
     37-code release a secondary CPU.  The value written to the register is 
     38+physical address of the register used to request the ROM code 
     39+release a secondary CPU.  The value written to the register is 
     40 formed by encoding the target CPU id into the low bits of the 
     41 physical start address it should jump to. 
     42  
     43@@ -19,8 +19,6 @@ Example: 
     44        cpus { 
     45                #address-cells = <1>; 
     46                #size-cells = <0>; 
     47-               enable-method = "brcm,bcm11351-cpu-method"; 
     48-               secondary-boot-reg = <0x3500417c>; 
     49  
     50                cpu0: cpu@0 { 
     51                        device_type = "cpu"; 
     52@@ -31,6 +29,8 @@ Example: 
     53                cpu1: cpu@1 { 
     54                        device_type = "cpu"; 
     55                        compatible = "arm,cortex-a9"; 
     56+                       enable-method = "brcm,bcm11351-cpu-method"; 
     57+                       secondary-boot-reg = <0x3500417c>; 
     58                        reg = <1>; 
     59                }; 
     60        }; 
    1761--- a/arch/arm/boot/dts/bcm11351.dtsi 
    1862+++ b/arch/arm/boot/dts/bcm11351.dtsi 
    19 @@ -31,7 +31,6 @@ 
     63@@ -30,8 +30,6 @@ 
     64        cpus { 
    2065                #address-cells = <1>; 
    2166                #size-cells = <0>; 
    22                 enable-method = "brcm,bcm11351-cpu-method"; 
     67-               enable-method = "brcm,bcm11351-cpu-method"; 
    2368-               secondary-boot-reg = <0x3500417c>; 
    2469  
    2570                cpu0: cpu@0 { 
    2671                        device_type = "cpu"; 
    27 @@ -42,6 +41,7 @@ 
     72@@ -42,6 +40,8 @@ 
    2873                cpu1: cpu@1 { 
    2974                        device_type = "cpu"; 
    3075                        compatible = "arm,cortex-a9"; 
     76+                       enable-method = "brcm,bcm11351-cpu-method"; 
    3177+                       secondary-boot-reg = <0x3500417c>; 
    3278                        reg = <1>; 
     
    3581--- a/arch/arm/boot/dts/bcm21664.dtsi 
    3682+++ b/arch/arm/boot/dts/bcm21664.dtsi 
    37 @@ -31,7 +31,6 @@ 
     83@@ -30,8 +30,6 @@ 
     84        cpus { 
    3885                #address-cells = <1>; 
    3986                #size-cells = <0>; 
    40                 enable-method = "brcm,bcm11351-cpu-method"; 
     87-               enable-method = "brcm,bcm11351-cpu-method"; 
    4188-               secondary-boot-reg = <0x35004178>; 
    4289  
    4390                cpu0: cpu@0 { 
    4491                        device_type = "cpu"; 
    45 @@ -42,6 +41,7 @@ 
     92@@ -42,6 +40,8 @@ 
    4693                cpu1: cpu@1 { 
    4794                        device_type = "cpu"; 
    4895                        compatible = "arm,cortex-a9"; 
     96+                       enable-method = "brcm,bcm11351-cpu-method"; 
    4997+                       secondary-boot-reg = <0x35004178>; 
    5098                        reg = <1>; 
     
    170218        void __iomem *boot_reg; 
    171219        phys_addr_t boot_func; 
    172 @@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned i 
     220@@ -154,15 +179,16 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle) 
    173221                return -EINVAL; 
    174222        } 
     
    190238  
    191239        /* 
    192 @@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned i 
     240@@ -191,12 +217,12 @@ static int bcm_boot_secondary(unsigned int cpu, struct task_struct *idle) 
    193241  
    194242        pr_err("timeout waiting for cpu %u to start\n", cpu_id); 
  • trunk/target/linux/bcm53xx/patches-4.4/023-ARM-BCM-Add-SMP-support-for-Broadcom-NSP.patch

    r47806 r47807  
    1 From e99fb6d01cddf38cffc11655aba4a96a981d604e Mon Sep 17 00:00:00 2001 
     1From 55be958cd27439a58c4d9369d6fe2a1f83efdaa6 Mon Sep 17 00:00:00 2001 
    22From: Kapil Hali <kapilh@broadcom.com> 
    3 Date: Wed, 25 Nov 2015 13:25:55 -0500 
    4 Subject: [PATCH 133/134] ARM: BCM: Add SMP support for Broadcom NSP 
     3Date: Sat, 5 Dec 2015 06:53:43 -0500 
     4Subject: [PATCH] ARM: BCM: Add SMP support for Broadcom NSP 
    55 
    66Add SMP support for Broadcom's Northstar Plus SoC 
     
    1515 
    1616Signed-off-by: Kapil Hali <kapilh@broadcom.com> 
     17Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> 
    1718--- 
    1819 arch/arm/mach-bcm/Kconfig    |   2 + 
     
    2425 create mode 100644 arch/arm/mach-bcm/platsmp.c 
    2526 
     27--- a/arch/arm/mach-bcm/Kconfig 
     28+++ b/arch/arm/mach-bcm/Kconfig 
     29@@ -40,6 +40,8 @@ config ARCH_BCM_NSP 
     30        select ARCH_BCM_IPROC 
     31        select ARM_ERRATA_754322 
     32        select ARM_ERRATA_775420 
     33+       select ARM_ERRATA_764369 if SMP 
     34+       select HAVE_SMP 
     35        help 
     36          Support for Broadcom Northstar Plus SoC. 
     37          Broadcom Northstar Plus family of SoCs are used for switching control 
    2638--- a/arch/arm/mach-bcm/Makefile 
    2739+++ b/arch/arm/mach-bcm/Makefile 
    28 @@ -23,7 +23,7 @@ obj-$(CONFIG_ARCH_BCM_281XX)  += board_bc 
     40@@ -14,7 +14,11 @@ 
     41 obj-$(CONFIG_ARCH_BCM_CYGNUS) +=  bcm_cygnus.o 
     42  
     43 # Northstar Plus 
     44-obj-$(CONFIG_ARCH_BCM_NSP) += bcm_nsp.o 
     45+obj-$(CONFIG_ARCH_BCM_NSP)     += bcm_nsp.o 
     46+ 
     47+ifeq ($(CONFIG_ARCH_BCM_NSP),y) 
     48+obj-$(CONFIG_SMP)              += platsmp.o 
     49+endif 
     50  
     51 # BCM281XX 
     52 obj-$(CONFIG_ARCH_BCM_281XX)   += board_bcm281xx.o 
     53@@ -23,7 +27,7 @@ obj-$(CONFIG_ARCH_BCM_281XX)  += board_bcm281xx.o 
    2954 obj-$(CONFIG_ARCH_BCM_21664)   += board_bcm21664.o 
    3055  
  • trunk/target/linux/bcm53xx/patches-4.4/024-ARM-BCM-Add-SMP-support-for-Broadcom-4708.patch

    r47806 r47807  
    1 From 16e1bf7dde22ee22a331aabf824cc31a6794a4cb Mon Sep 17 00:00:00 2001 
     1From af0783a87a365e87e5ee0ac0ba7e3075abc5007c Mon Sep 17 00:00:00 2001 
    22From: Jon Mason <jonmason@broadcom.com> 
    3 Date: Thu, 15 Oct 2015 14:09:10 -0400 
    4 Subject: [PATCH 134/134] ARM: BCM: Add SMP support for Broadcom 4708 
     3Date: Sat, 5 Dec 2015 06:53:44 -0500 
     4Subject: [PATCH] ARM: BCM: Add SMP support for Broadcom 4708 
    55 
    66Add SMP support for Broadcom's 4708 SoCs. 
     
    1010Tested-by: Hauke Mehrtens <hauke@hauke-m.de> 
    1111Signed-off-by: Kapil Hali <kapilh@broadcom.com> 
     12Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> 
    1213--- 
    13  arch/arm/boot/dts/bcm4708.dtsi | 2 ++ 
     14 arch/arm/boot/dts/bcm4708.dtsi | 3 ++- 
    1415 arch/arm/mach-bcm/Kconfig      | 1 + 
    1516 arch/arm/mach-bcm/Makefile     | 3 +++ 
    16  3 files changed, 6 insertions(+) 
     17 3 files changed, 6 insertions(+), 1 deletion(-) 
    1718 
    1819--- a/arch/arm/boot/dts/bcm4708.dtsi 
    1920+++ b/arch/arm/boot/dts/bcm4708.dtsi 
    20 @@ -15,6 +15,7 @@ 
    21         cpus { 
    22                 #address-cells = <1>; 
    23                 #size-cells = <0>; 
    24 +               enable-method = "brcm,bcm-nsp-smp"; 
    25   
    26                 cpu@0 { 
    27                         device_type = "cpu"; 
    28 @@ -27,6 +28,7 @@ 
     21@@ -27,8 +27,9 @@ 
    2922                        device_type = "cpu"; 
    3023                        compatible = "arm,cortex-a9"; 
    3124                        next-level-cache = <&L2>; 
     25+                       enable-method = "brcm,bcm-nsp-smp"; 
    3226+                       secondary-boot-reg = <0xffff0400>; 
    3327                        reg = <0x1>; 
    3428                }; 
    3529        }; 
     30- 
     31 }; 
    3632--- a/arch/arm/mach-bcm/Kconfig 
    3733+++ b/arch/arm/mach-bcm/Kconfig 
    38 @@ -55,6 +55,7 @@ config ARCH_BCM_5301X 
    39         select ARM_ERRATA_754322 
    40         select ARM_ERRATA_775420 
    41         select ARM_ERRATA_764369 if SMP 
     34@@ -29,6 +29,7 @@ config ARCH_BCM_IPROC 
     35 config ARCH_BCM_CYGNUS 
     36        bool "Broadcom Cygnus Support" if ARCH_MULTI_V7 
     37        select ARCH_BCM_IPROC 
    4238+       select HAVE_SMP 
    43   
    4439        help 
    45           Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. 
     40          Enable support for the Cygnus family, 
     41          which includes the following variants: 
    4642--- a/arch/arm/mach-bcm/Makefile 
    4743+++ b/arch/arm/mach-bcm/Makefile 
    48 @@ -39,6 +39,9 @@ obj-$(CONFIG_ARCH_BCM2835)    += board_bcm2 
     44@@ -43,6 +43,9 @@ obj-$(CONFIG_ARCH_BCM2835)    += board_bcm2835.o 
    4945  
    5046 # BCM5301X 
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