Changeset 44722


Ignore:
Timestamp:
2015-03-13T04:00:59+01:00 (3 years ago)
Author:
nbd
Message:

atheros: v3.18: cleanup register headers

AFAIK, no one AR2315+ chip (AR2315, AR2316, AR2317, AR2318) does not
contain IR block, so remove IR registers definitions. Also remove few
unused macroses.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/atheros/patches-3.18/100-board.patch

    r44720 r44722  
    630630--- /dev/null 
    631631+++ b/arch/mips/include/asm/mach-ath25/ar2315_regs.h 
    632 @@ -0,0 +1,511 @@ 
     632@@ -0,0 +1,470 @@ 
    633633+/* 
    634634+ * Register definitions for AR2315+ 
     
    851851+#define AR2315_GISR_TIMER      0x0020 
    852852+#define AR2315_GISR_ETHERNET   0x0040 
    853 + 
    854 +/* 
    855 + * Interrupt routing from IO to the processor IP bits 
    856 + * Define our inter mask and level 
    857 + */ 
    858 +#define AR2315_INTR_MISCIO      SR_IBIT3 
    859 +#define AR2315_INTR_WLAN0       SR_IBIT4 
    860 +#define AR2315_INTR_ENET0       SR_IBIT5 
    861 +#define AR2315_INTR_LOCALPCI    SR_IBIT6 
    862 +#define AR2315_INTR_WMACPOLL    SR_IBIT7 
    863 +#define AR2315_INTR_COMPARE     SR_IBIT8 
    864853+ 
    865854+/* 
     
    11111100+#define AR2315_LB_MBOX          (AR2315_LOCAL + 0x0600) 
    11121101+ 
    1113 +/* 
    1114 + * IR Interface Registers 
    1115 + */ 
    1116 +#define AR2315_IR_PKTDATA              (AR2315_IR + 0x0000) 
    1117 + 
    1118 +#define AR2315_IR_PKTLEN               (AR2315_IR + 0x07fc) /* 0 - 63 */ 
    1119 + 
    1120 +#define AR2315_IR_CONTROL              (AR2315_IR + 0x0800) 
    1121 +#define AR2315_IRCTL_TX                        0x00000000  /* use as tranmitter */ 
    1122 +#define AR2315_IRCTL_RX                        0x00000001  /* use as receiver   */ 
    1123 +#define AR2315_IRCTL_SAMPLECLK_MASK    0x00003ffe  /* Sample clk divisor */ 
    1124 +#define AR2315_IRCTL_SAMPLECLK_SHFT    1 
    1125 +#define AR2315_IRCTL_OUTPUTCLK_MASK    0x03ffc000  /* Output clk div */ 
    1126 +#define AR2315_IRCTL_OUTPUTCLK_SHFT    14 
    1127 + 
    1128 +#define AR2315_IR_STATUS               (AR2315_IR + 0x0804) 
    1129 +#define AR2315_IRSTS_RX                        0x00000001  /* receive in progress */ 
    1130 +#define AR2315_IRSTS_TX                        0x00000002  /* transmit in progress */ 
    1131 + 
    1132 +#define AR2315_IR_CONFIG               (AR2315_IR + 0x0808) 
    1133 +#define AR2315_IRCFG_INVIN             0x00000001  /* invert in polarity */ 
    1134 +#define AR2315_IRCFG_INVOUT            0x00000002  /* invert out polarity */ 
    1135 +#define AR2315_IRCFG_SEQ_START_WIN_SEL 0x00000004  /* 1 => 28, 0 => 7 */ 
    1136 +#define AR2315_IRCFG_SEQ_START_THRESH  0x000000f0 
    1137 +#define AR2315_IRCFG_SEQ_END_UNIT_SEL  0x00000100 
    1138 +#define AR2315_IRCFG_SEQ_END_UNIT_THRESH 0x00007e00 
    1139 +#define AR2315_IRCFG_SEQ_END_WIN_SEL   0x00008000 
    1140 +#define AR2315_IRCFG_SEQ_END_WIN_THRESH        0x001f0000 
    1141 +#define AR2315_IRCFG_NUM_BACKOFF_WORDS 0x01e00000 
    1142 + 
    11431102+#endif /* __ASM_MACH_ATH25_AR2315_REGS_H */ 
    11441103--- /dev/null 
    11451104+++ b/arch/mips/include/asm/mach-ath25/ar5312_regs.h 
    1146 @@ -0,0 +1,235 @@ 
     1105@@ -0,0 +1,224 @@ 
    11471106+/* 
    11481107+ * This file is subject to the terms and conditions of the GNU General Public 
     
    11851144+/* 
    11861145+ * Address Map 
     1146+ * 
     1147+ * The AR5312 supports 2 enet MACS, even though many reference boards only 
     1148+ * actually use 1 of them (i.e. Only MAC 0 is actually connected to an enet 
     1149+ * PHY or PHY switch. The AR2312 supports 1 enet MAC. 
    11871150+ */ 
    11881151+#define AR5312_WLAN0            0x18000000 
     
    11971160+ 
    11981161+/* 
    1199 + * AR5312_NUM_ENET_MAC defines the number of ethernet MACs that 
    1200 + * should be considered available.  The AR5312 supports 2 enet MACS, 
    1201 + * even though many reference boards only actually use 1 of them 
    1202 + * (i.e. Only MAC 0 is actually connected to an enet PHY or PHY switch. 
    1203 + * The AR2312 supports 1 enet MAC. 
    1204 + */ 
    1205 +#define AR5312_NUM_ENET_MAC             2 
    1206 + 
    1207 +/* 
    12081162+ * Need these defines to determine true number of ethernet MACs 
    12091163+ */ 
     
    12151169+#define AR5312_ENET0_MII       (AR5312_ENET0 + 0x14) 
    12161170+#define AR5312_ENET1_MII       (AR5312_ENET1 + 0x14) 
    1217 + 
    1218 +/* 
    1219 + * AR5312_NUM_WMAC defines the number of Wireless MACs that\ 
    1220 + * should be considered available. 
    1221 + */ 
    1222 +#define AR5312_NUM_WMAC                 2 
    12231171+ 
    12241172+/* Reset/Timer Block Address Map */ 
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