Changeset 42499


Ignore:
Timestamp:
2014-09-12T08:52:51+02:00 (3 years ago)
Author:
blogic
Message:

atheros: ar2315-pci: cosmetic changes

  • add comment, which briefly describes PCI controller features and

Fonera 2.0g schematics.

  • rename several functions and structures, to make it clear that this code only for AR2315 chips.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/atheros/patches-3.14/105-ar2315_pci.patch

    r42498 r42499  
    88--- /dev/null 
    99+++ b/arch/mips/ar231x/pci.c 
    10 @@ -0,0 +1,229 @@ 
     10@@ -0,0 +1,254 @@ 
    1111+/* 
    1212+ * This program is free software; you can redistribute it and/or 
     
    2222+ * You should have received a copy of the GNU General Public License 
    2323+ * along with this program; if not, see <http://www.gnu.org/licenses/>. 
     24+ */ 
     25+ 
     26+/** 
     27+ * Both AR2315 and AR2316 chips have PCI interface unit, which supports DMA 
     28+ * and interrupt. PCI interface supports MMIO access method, but does not 
     29+ * seem to support I/O ports. 
     30+ * 
     31+ * Read/write operation in the region 0x80000000-0xBFFFFFFF causes 
     32+ * a memory read/write command on the PCI bus. 30 LSBs of address on 
     33+ * the bus are taken from memory read/write request and 2 MSBs are 
     34+ * determined by PCI unit configuration. 
     35+ * 
     36+ * To work with the configuration space instead of memory is necessary set 
     37+ * the CFG_SEL bit in the PCI_MISC_CONFIG register. 
     38+ * 
     39+ * Devices on the bus can perform DMA requests via chip BAR1. PCI host 
     40+ * controller BARs are programmend as if an external device is programmed. 
     41+ * Which means that during configuration, IDSEL pin of the chip should be 
     42+ * asserted. 
     43+ * 
     44+ * We know (and support) only one board that uses the PCI interface - 
     45+ * Fonera 2.0g (FON2202). It has a USB EHCI controller connected to the 
     46+ * AR2315 PCI bus. IDSEL pin of USB controller is connected to AD[13] line 
     47+ * and IDSEL pin of AR125 is connected to AD[16] line. 
    2448+ */ 
    2549+ 
     
    4468+static unsigned long configspace; 
    4569+ 
    46 +static int config_access(int devfn, int where, int size, u32 *ptr, bool write) 
     70+static int ar2315_pci_cfg_access(int devfn, int where, int size, u32 *ptr, 
     71+                                bool write) 
    4772+{ 
    4873+       int func = PCI_FUNC(devfn); 
     
    92117+} 
    93118+ 
    94 +static int ar231x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, 
    95 +                          int size, u32 *value) 
    96 +{ 
    97 +       return config_access(devfn, where, size, value, 0); 
    98 +} 
    99 + 
    100 +static int ar231x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, 
    101 +                           int size, u32 value) 
    102 +{ 
    103 +       return config_access(devfn, where, size, &value, 1); 
    104 +} 
    105 + 
    106 +static struct pci_ops ar231x_pci_ops = { 
    107 +       .read   = ar231x_pci_read, 
    108 +       .write  = ar231x_pci_write, 
     119+static int ar2315_pci_cfg_read(struct pci_bus *bus, unsigned int devfn, 
     120+                              int where, int size, u32 *value) 
     121+{ 
     122+       return ar2315_pci_cfg_access(devfn, where, size, value, 0); 
     123+} 
     124+ 
     125+static int ar2315_pci_cfg_write(struct pci_bus *bus, unsigned int devfn, 
     126+                               int where, int size, u32 value) 
     127+{ 
     128+       return ar2315_pci_cfg_access(devfn, where, size, &value, 1); 
     129+} 
     130+ 
     131+static struct pci_ops ar2315_pci_ops = { 
     132+       .read   = ar2315_pci_cfg_read, 
     133+       .write  = ar2315_pci_cfg_write, 
    109134+}; 
    110135+ 
    111 +static struct resource ar231x_mem_resource = { 
    112 +       .name   = "AR2315 PCI MEM", 
     136+static struct resource ar2315_mem_resource = { 
     137+       .name   = "ar2315-pci-mem", 
    113138+       .start  = AR2315_MEM_BASE, 
    114139+       .end    = AR2315_MEM_BASE + AR2315_MEM_SIZE - AR2315_IO_SIZE - 1 + 
     
    117142+}; 
    118143+ 
    119 +static struct resource ar231x_io_resource = { 
    120 +       .name   = "AR2315 PCI I/O", 
     144+static struct resource ar2315_io_resource = { 
     145+       .name   = "ar2315-pci-io", 
    121146+       .start  = AR2315_MEM_BASE + AR2315_MEM_SIZE - AR2315_IO_SIZE, 
    122147+       .end    = AR2315_MEM_BASE + AR2315_MEM_SIZE - 1, 
     
    124149+}; 
    125150+ 
    126 +static struct pci_controller ar231x_pci_controller = { 
    127 +       .pci_ops                = &ar231x_pci_ops, 
    128 +       .mem_resource   = &ar231x_mem_resource, 
    129 +       .io_resource    = &ar231x_io_resource, 
     151+static struct pci_controller ar2315_pci_controller = { 
     152+       .pci_ops        = &ar2315_pci_ops, 
     153+       .mem_resource   = &ar2315_mem_resource, 
     154+       .io_resource    = &ar2315_io_resource, 
    130155+       .mem_offset     = 0x00000000UL, 
    131156+       .io_offset      = 0x00000000UL, 
     
    188213+       configspace = (unsigned long)ioremap_nocache(AR2315_PCIEXT, 
    189214+                                                    1 * 1024 * 1024); 
    190 +       ar231x_pci_controller.io_map_base = 
     215+       ar2315_pci_controller.io_map_base = 
    191216+                       (unsigned long)ioremap_nocache(AR2315_MEM_BASE + 
    192217+                       AR2315_MEM_SIZE, AR2315_IO_SIZE); 
    193 +       set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space*/ 
     218+       set_io_port_base(ar2315_pci_controller.io_map_base); /* PCI I/O space*/ 
    194219+ 
    195220+       reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA); 
     
    232257+       ioport_resource.end = 0xffffffff; 
    233258+ 
    234 +       register_pci_controller(&ar231x_pci_controller); 
     259+       register_pci_controller(&ar2315_pci_controller); 
    235260+ 
    236261+       return 0; 
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