Changeset 36541


Ignore:
Timestamp:
2013-05-03T21:00:58+02:00 (5 years ago)
Author:
juhosg
Message:

ar71xx: Fix AP135 PCI

AP135 has a pluggable PCIE slot unlike AP136.

Signed-off-by: Sujith Manoharan <c_manoha@…>
Signed-off-by: Gabor Juhos <juhosg@…>

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/ar71xx/patches-3.8/609-MIPS-ath79-ap136-fixes.patch

    r35878 r36541  
    11--- a/arch/mips/ath79/mach-ap136.c 
    22+++ b/arch/mips/ath79/mach-ap136.c 
    3 @@ -18,23 +18,28 @@ 
     3@@ -18,23 +18,29 @@ 
    44  * 
    55  */ 
     
    1414+ 
    1515+#include "common.h" 
     16+#include "pci.h" 
    1617+#include "dev-ap9x-pci.h" 
    1718 #include "dev-gpio-buttons.h" 
     
    3839  
    3940 #define AP136_GPIO_BTN_WPS             16 
    40 @@ -43,37 +48,39 @@ 
     41@@ -43,37 +49,39 @@ 
    4142 #define AP136_KEYS_POLL_INTERVAL       20      /* msecs */ 
    4243 #define AP136_KEYS_DEBOUNCE_INTERVAL   (3 * AP136_KEYS_POLL_INTERVAL) 
     
    8687                .active_low     = 1, 
    8788        } 
    88 @@ -98,65 +105,158 @@ static struct gpio_keys_button ap136_gpi 
     89@@ -98,65 +106,169 @@ static struct gpio_keys_button ap136_gpi 
    8990        }, 
    9091 }; 
     
    189190+ 
    190191+       ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); 
    191 +       ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); 
    192192+ 
    193193+       ap136_gmac_setup(); 
     
    217217+static void __init ap136_010_setup(void) 
    218218+{ 
     219+       u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); 
     220+ 
    219221+       /* GMAC0 of the AR8327 switch is connected to GMAC0 via RGMII */ 
    220222+       ap136_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; 
     
    233235+ 
    234236+       ap136_common_setup(); 
     237+       ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); 
    235238 } 
    236239  
     
    240243+            ap136_010_setup); 
    241244+ 
    242 +static void __init ap136_020_setup(void) 
     245+static void __init ap136_020_common_setup(void) 
    243246+{ 
    244247+       /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ 
     
    259262+} 
    260263+ 
     264+static void __init ap136_020_setup(void) 
     265+{ 
     266+       u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); 
     267+ 
     268+       ap136_020_common_setup(); 
     269+       ap91_pci_init(art + AP136_PCIE_CALDATA_OFFSET, NULL); 
     270+} 
     271+ 
    261272+MIPS_MACHINE(ATH79_MACH_AP136_020, "AP136-020", 
    262273+            "Atheros AP136-020 reference board", 
     
    276287+       ap136_leds_gpio[5].name = "ap135:red:usb"; 
    277288+ 
    278 +       ap136_020_setup(); 
     289+       ap136_020_common_setup(); 
     290+       ath79_register_pci(); 
    279291+} 
    280292+ 
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