Changeset 33381


Ignore:
Timestamp:
2012-09-12T21:03:12+02:00 (5 years ago)
Author:
juhosg
Message:

ramips/rt305x: add initial support for Rt5350 SoC

Somehow detecting the RAM size in common/setup.c doesn't
work here, it always detects 64M and then crashes on devices
with less RAM.
Probably using MEMC_REG_SDRAM_CFG1 to know the RAM size is how
it could be, for now I use the mem=32M kernel parameter to get
stuff working.

Signed-off-by: Daniel Golle <dgolle@…>

Location:
trunk/target/linux/ramips/files/arch/mips
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x.h

    r31400 r33381  
    2323        RT305X_SOC_RT3350, 
    2424        RT305X_SOC_RT3352, 
     25        RT305X_SOC_RT5350, 
    2526}; 
    2627 
     
    5051{ 
    5152        return rt305x_soc == RT305X_SOC_RT3352; 
     53} 
     54 
     55static inline int soc_is_rt5350(void) 
     56{ 
     57        return rt305x_soc == RT305X_SOC_RT5350; 
    5258} 
    5359 
  • trunk/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h

    r31402 r33381  
    7777#define RT3352_CHIP_NAME1       0x20203235 
    7878 
     79#define RT5350_CHIP_NAME0       0x33355452 
     80#define RT5350_CHIP_NAME1       0x20203035 
     81 
    7982#define CHIP_ID_ID_MASK         0xff 
    8083#define CHIP_ID_ID_SHIFT        8 
     
    9598#define RT3352_SYSCFG0_CPUCLK_LOW       0x0 
    9699#define RT3352_SYSCFG0_CPUCLK_HIGH      0x1 
     100 
     101#define RT5350_SYSCFG0_CPUCLK_SHIFT     8 
     102#define RT5350_SYSCFG0_CPUCLK_MASK      0x3 
     103#define RT5350_SYSCFG0_CPUCLK_360       0x0 
     104#define RT5350_SYSCFG0_CPUCLK_320       0x2 
     105#define RT5350_SYSCFG0_CPUCLK_300       0x3 
    97106 
    98107#define RT3352_SYSCFG1_USB0_HOST_MODE   BIT(10) 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c

    r32812 r33381  
    6363                rt305x_uart_clk.rate = 40000000; 
    6464                rt305x_wdt_clk.rate = rt305x_sys_clk.rate; 
     65        } else if (soc_is_rt5350()) { 
     66                t = (t >> RT5350_SYSCFG0_CPUCLK_SHIFT) & 
     67                     RT5350_SYSCFG0_CPUCLK_MASK; 
     68                switch (t) { 
     69                case RT5350_SYSCFG0_CPUCLK_360: 
     70                        rt305x_cpu_clk.rate = 360000000; 
     71                        rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3; 
     72                        break; 
     73                case RT5350_SYSCFG0_CPUCLK_320: 
     74                        rt305x_cpu_clk.rate = 320000000; 
     75                        rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 4; 
     76                        break; 
     77                case RT5350_SYSCFG0_CPUCLK_300: 
     78                        rt305x_cpu_clk.rate = 300000000; 
     79                        rt305x_sys_clk.rate = rt305x_cpu_clk.rate / 3; 
     80                        break; 
     81                default: 
     82                        BUG(); 
     83                } 
     84                rt305x_uart_clk.rate = 40000000; 
     85                rt305x_wdt_clk.rate = rt305x_sys_clk.rate; 
    6586        } else { 
    6687                BUG(); 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c

    r33301 r33381  
    405405        if (soc_is_rt305x() || soc_is_rt3350()) { 
    406406                platform_device_register(&rt305x_dwc_otg_device); 
    407         } else if (soc_is_rt3352()) { 
     407        } else if (soc_is_rt3352() || soc_is_rt5350()) { 
    408408                platform_device_register(&rt3352_ehci_device); 
    409409                platform_device_register(&rt3352_ohci_device); 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c

    r31400 r33381  
    5555                rt305x_soc = RT305X_SOC_RT3352; 
    5656                name = "RT3352"; 
     57        } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) { 
     58                rt305x_soc = RT305X_SOC_RT5350; 
     59                name = "RT5350"; 
    5760        } else { 
    5861                panic("rt305x: unknown SoC, n0:%08x n1:%08x\n", n0, n1); 
     
    6972        ramips_mem_base = RT305X_SDRAM_BASE; 
    7073 
    71         if (soc_is_rt305x() || soc_is_rt3350()) { 
     74        if (soc_is_rt305x() || soc_is_rt3350() || soc_is_rt5350()) { 
    7275                ramips_mem_size_min = RT305X_MEM_SIZE_MIN; 
    7376                ramips_mem_size_max = RT305X_MEM_SIZE_MAX; 
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