Changeset 32000


Ignore:
Timestamp:
2012-05-29T18:39:27+02:00 (6 years ago)
Author:
juhosg
Message:

generic: ar8216: add revision specific PHY fixups for AR8327

Location:
trunk/target/linux/generic/files/drivers/net/phy
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/generic/files/drivers/net/phy/ar8216.c

    r31999 r32000  
    192192} 
    193193 
     194static void 
     195ar8216_phy_mmd_write(struct ar8216_priv *priv, int phy_addr, u16 addr, u16 data) 
     196{ 
     197        struct mii_bus *bus = priv->phy->bus; 
     198 
     199        mutex_lock(&bus->mdio_lock); 
     200        bus->write(bus, phy_addr, MII_ATH_MMD_ADDR, addr); 
     201        bus->write(bus, phy_addr, MII_ATH_MMD_DATA, data); 
     202        mutex_unlock(&bus->mdio_lock); 
     203} 
     204 
    194205static u32 
    195206ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val) 
     
    693704} 
    694705 
     706static void 
     707ar8327_phy_fixup(struct ar8216_priv *priv, int phy) 
     708{ 
     709        switch (priv->chip_rev) { 
     710        case 1: 
     711                /* For 100M waveform */ 
     712                ar8216_phy_dbg_write(priv, phy, 0, 0x02ea); 
     713                /* Turn on Gigabit clock */ 
     714                ar8216_phy_dbg_write(priv, phy, 0x3d, 0x68a0); 
     715                break; 
     716 
     717        case 2: 
     718                ar8216_phy_mmd_write(priv, phy, 0x7, 0x3c); 
     719                ar8216_phy_mmd_write(priv, phy, 0x4007, 0x0); 
     720                /* fallthrough */ 
     721        case 4: 
     722                ar8216_phy_mmd_write(priv, phy, 0x3, 0x800d); 
     723                ar8216_phy_mmd_write(priv, phy, 0x4003, 0x803f); 
     724 
     725                ar8216_phy_dbg_write(priv, phy, 0x3d, 0x6860); 
     726                ar8216_phy_dbg_write(priv, phy, 0x5, 0x2c46); 
     727                ar8216_phy_dbg_write(priv, phy, 0x3c, 0x6000); 
     728                break; 
     729        } 
     730} 
     731 
    695732static int 
    696733ar8327_hw_init(struct ar8216_priv *priv) 
     
    713750        priv->write(priv, AR8327_REG_POWER_ON_STRIP, 0x40000000); 
    714751 
    715         /* fixup PHYs */ 
    716         for (i = 0; i < AR8327_NUM_PHYS; i++) { 
    717                 /* For 100M waveform */ 
    718                 ar8216_phy_dbg_write(priv, i, 0, 0x02ea); 
    719  
    720                 /* Turn on Gigabit clock */ 
    721                 ar8216_phy_dbg_write(priv, i, 0x3d, 0x68a0); 
    722         } 
     752        for (i = 0; i < AR8327_NUM_PHYS; i++) 
     753                ar8327_phy_fixup(priv, i); 
    723754 
    724755        return 0; 
  • trunk/target/linux/generic/files/drivers/net/phy/ar8216.h

    r31999 r32000  
    2626 
    2727/* Atheros specific MII registers */ 
     28#define MII_ATH_MMD_ADDR                0x0d 
     29#define MII_ATH_MMD_DATA                0x0e 
    2830#define MII_ATH_DBG_ADDR                0x1d 
    2931#define MII_ATH_DBG_DATA                0x1e 
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