Changeset 31060


Ignore:
Timestamp:
2012-03-25T10:50:09+02:00 (6 years ago)
Author:
blogic
Message:

[lantiq] bump kernel to 3.2.12

Location:
trunk/target/linux/lantiq
Files:
68 added
2 deleted
10 edited
53 copied
1 moved

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/lantiq/Makefile

    r29966 r31060  
    1313DEFAULT_SUBTARGET:=danube 
    1414 
    15 LINUX_VERSION:=3.1.10 
     15LINUX_VERSION:=3.2.12 
    1616 
    1717CFLAGS=-Os -pipe -mips32r2 -mtune=mips32r2 -fno-caller-saves 
  • trunk/target/linux/lantiq/ar9/config-default

    r28405 r31060  
    11CONFIG_ADM6996_PHY=y 
    22CONFIG_AR8216_PHY=y 
    3 # CONFIG_ARCH_DMA_ADDR_T_64BIT is not set 
    4 # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set 
    5 # CONFIG_ATH79 is not set 
    6 CONFIG_GENERIC_ATOMIC64=y 
    7 CONFIG_GENERIC_IRQ_SHOW=y 
    8 CONFIG_HAVE_ARCH_JUMP_LABEL=y 
    9 CONFIG_HAVE_C_RECORDMCOUNT=y 
    10 CONFIG_HAVE_DMA_API_DEBUG=y 
    11 CONFIG_HAVE_DMA_ATTRS=y 
    12 CONFIG_HAVE_DYNAMIC_FTRACE=y 
    13 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 
    14 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 
    15 CONFIG_HAVE_FUNCTION_TRACER=y 
    16 CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 
    17 CONFIG_HAVE_GENERIC_HARDIRQS=y 
    18 CONFIG_HAVE_IRQ_WORK=y 
    19 CONFIG_HAVE_PERF_EVENTS=y 
     3# CONFIG_ATMEL_PWM is not set 
     4CONFIG_CLKDEV_LOOKUP=y 
     5CONFIG_FSNOTIFY=y 
     6CONFIG_HAVE_MACH_CLKDEV=y 
    207CONFIG_HW_HAS_PCI=y 
    218CONFIG_INPUT=y 
     
    2310# CONFIG_INPUT_GPIO_BUTTONS is not set 
    2411CONFIG_INPUT_POLLDEV=y 
     12CONFIG_IRQ_FORCED_THREADING=y 
    2513# CONFIG_ISDN is not set 
    2614CONFIG_LANTIQ_ETOP=y 
    27 # CONFIG_LANTIQ_MACH_ARV45XX is not set 
     15# CONFIG_LANTIQ_MACH_ARV is not set 
    2816# CONFIG_LANTIQ_MACH_EASY50712 is not set 
     17CONFIG_LANTIQ_MACH_FRITZ_AR9=y 
     18# CONFIG_LANTIQ_MACH_FRITZ_VR9 is not set 
     19# CONFIG_LANTIQ_MACH_GIGASX76X is not set 
    2920CONFIG_LANTIQ_MACH_NETGEAR=y 
    3021CONFIG_LANTIQ_MACH_WBMR=y 
    31 # CONFIG_LANTIQ_MACH_GIGASX76X is not set 
    32 CONFIG_MACH_NO_WESTBRIDGE=y 
    33 # CONFIG_MINIX_FS_NATIVE_ENDIAN is not set 
    34 CONFIG_NEED_DMA_MAP_STATE=y 
    35 CONFIG_NEED_PER_CPU_KM=y 
     22# CONFIG_LANTIQ_VRX200 is not set 
     23CONFIG_MDIO_BOARDINFO=y 
     24# CONFIG_MLX4_CORE is not set 
     25CONFIG_MTD_BLOCK2MTD=y 
    3626CONFIG_PCI=y 
     27# CONFIG_PCIEPORTBUS is not set 
     28# CONFIG_PCIE_LANTIQ is not set 
    3729CONFIG_PCI_DOMAINS=y 
    38 CONFIG_PERF_USE_VMALLOC=y 
    39 # CONFIG_PREEMPT_RCU is not set 
    40 # CONFIG_QUOTACTL is not set 
     30CONFIG_PCI_LANTIQ=y 
     31# CONFIG_PCI_LANTIQ_NONE is not set 
    4132CONFIG_RTL8306_PHY=y 
    4233# CONFIG_SOC_AMAZON_SE is not set 
    43 # CONFIG_SOC_VR9 is not set 
    4434# CONFIG_SOC_FALCON is not set 
    4535CONFIG_SOC_TYPE_XWAY=y 
    4636CONFIG_SOC_XWAY=y 
    47 CONFIG_SPI=y 
    48 CONFIG_SPI_BITBANG=y 
    49 # CONFIG_SPI_GPIO is not set 
    50 CONFIG_SPI_LANTIQ=y 
    51 CONFIG_SPI_MASTER=y 
     37CONFIG_USB_ARCH_HAS_XHCI=y 
    5238CONFIG_USB_SUPPORT=y 
    53 CONFIG_XZ_DEC=y 
    54 CONFIG_SPI_XWAY=y 
  • trunk/target/linux/lantiq/ar9/profiles/001-lantiq.mk

    r28998 r31060  
    11define Profile/EASY50812 
    2   NAME:=EASY50812 
     2  NAME:=EASY50812 - Eval Board 
    33  PACKAGES:= kmod-usb-core kmod-usb-dwc-otg 
    44endef 
  • trunk/target/linux/lantiq/ar9/profiles/002-netgear.mk

    r28998 r31060  
    11define Profile/DGN3500B 
    2   NAME:=DGN3500B 
     2  NAME:=DGN3500B Netgear 
    33  PACKAGES:= kmod-usb-core kmod-usb-dwc-otg 
    44endef 
  • trunk/target/linux/lantiq/ase/config-default

    r28405 r31060  
    1 # CONFIG_ARCH_DMA_ADDR_T_64BIT is not set 
    2 # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set 
    3 # CONFIG_ATH79 is not set 
    4 CONFIG_GENERIC_ATOMIC64=y 
    5 CONFIG_GENERIC_IRQ_SHOW=y 
    6 CONFIG_HAVE_ARCH_JUMP_LABEL=y 
    7 CONFIG_HAVE_C_RECORDMCOUNT=y 
    8 CONFIG_HAVE_DMA_API_DEBUG=y 
    9 CONFIG_HAVE_DMA_ATTRS=y 
    10 CONFIG_HAVE_DYNAMIC_FTRACE=y 
    11 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 
    12 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 
    13 CONFIG_HAVE_FUNCTION_TRACER=y 
    14 CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 
    15 CONFIG_HAVE_GENERIC_HARDIRQS=y 
    16 CONFIG_HAVE_IRQ_WORK=y 
    17 CONFIG_HAVE_PERF_EVENTS=y 
     1# CONFIG_ATMEL_PWM is not set 
     2CONFIG_CLKDEV_LOOKUP=y 
     3CONFIG_FSNOTIFY=y 
     4CONFIG_HAVE_MACH_CLKDEV=y 
    185CONFIG_INPUT=y 
    196CONFIG_INPUT_EVDEV=y 
    207# CONFIG_INPUT_GPIO_BUTTONS is not set 
    218CONFIG_INPUT_POLLDEV=y 
     9CONFIG_IRQ_FORCED_THREADING=y 
    2210# CONFIG_ISDN is not set 
    2311CONFIG_LANTIQ_ETOP=y 
    2412CONFIG_LANTIQ_MACH_EASY50601=y 
    25 CONFIG_MACH_NO_WESTBRIDGE=y 
    26 # CONFIG_MINIX_FS_NATIVE_ENDIAN is not set 
    27 # CONFIG_MTD_LATCH_ADDR is not set 
    28 CONFIG_NEED_DMA_MAP_STATE=y 
    29 CONFIG_NEED_PER_CPU_KM=y 
    30 CONFIG_PERF_USE_VMALLOC=y 
    31 # CONFIG_PREEMPT_RCU is not set 
    32 # CONFIG_QUOTACTL is not set 
     13# CONFIG_LANTIQ_VRX200 is not set 
     14CONFIG_MDIO_BOARDINFO=y 
    3315CONFIG_SOC_AMAZON_SE=y 
    34 # CONFIG_SOC_VR9 is not set 
    3516# CONFIG_SOC_FALCON is not set 
    3617CONFIG_SOC_TYPE_XWAY=y 
    3718# CONFIG_SOC_XWAY is not set 
    38 CONFIG_XZ_DEC=y 
    39 CONFIG_SPI_XWAY=y 
     19# CONFIG_USB_ARCH_HAS_EHCI is not set 
     20# CONFIG_USB_ARCH_HAS_OHCI is not set 
     21# CONFIG_USB_ARCH_HAS_XHCI is not set 
     22CONFIG_USB_SUPPORT=y 
  • trunk/target/linux/lantiq/danube/config-default

    r28405 r31060  
    11CONFIG_ADM6996_PHY=y 
    22CONFIG_AR8216_PHY=y 
    3 # CONFIG_ARCH_DMA_ADDR_T_64BIT is not set 
    4 # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set 
    5 # CONFIG_ATH79 is not set 
    6 CONFIG_GENERIC_ATOMIC64=y 
    7 CONFIG_GENERIC_IRQ_SHOW=y 
    8 CONFIG_HAVE_ARCH_JUMP_LABEL=y 
    9 CONFIG_HAVE_C_RECORDMCOUNT=y 
    10 CONFIG_HAVE_DMA_API_DEBUG=y 
    11 CONFIG_HAVE_DMA_ATTRS=y 
    12 CONFIG_HAVE_DYNAMIC_FTRACE=y 
    13 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y 
    14 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y 
    15 CONFIG_HAVE_FUNCTION_TRACER=y 
    16 CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y 
    17 CONFIG_HAVE_GENERIC_HARDIRQS=y 
    18 CONFIG_HAVE_IRQ_WORK=y 
    19 CONFIG_HAVE_PERF_EVENTS=y 
     3# CONFIG_ATMEL_PWM is not set 
     4CONFIG_CLKDEV_LOOKUP=y 
     5CONFIG_FSNOTIFY=y 
     6CONFIG_HAVE_MACH_CLKDEV=y 
    207CONFIG_HW_HAS_PCI=y 
    218CONFIG_INPUT=y 
     
    2310# CONFIG_INPUT_GPIO_BUTTONS is not set 
    2411CONFIG_INPUT_POLLDEV=y 
     12CONFIG_IRQ_FORCED_THREADING=y 
    2513# CONFIG_ISDN is not set 
    2614CONFIG_LANTIQ_ETOP=y 
    27 CONFIG_LANTIQ_MACH_ARV45XX=y 
     15CONFIG_LANTIQ_MACH_ARV=y 
    2816CONFIG_LANTIQ_MACH_EASY50712=y 
     17# CONFIG_LANTIQ_MACH_FRITZ_AR9 is not set 
     18# CONFIG_LANTIQ_MACH_FRITZ_VR9 is not set 
     19CONFIG_LANTIQ_MACH_GIGASX76X=y 
    2920# CONFIG_LANTIQ_MACH_NETGEAR is not set 
    3021# CONFIG_LANTIQ_MACH_WBMR is not set 
    31 CONFIG_LANTIQ_MACH_GIGASX76X=y 
    32 CONFIG_MACH_NO_WESTBRIDGE=y 
    33 # CONFIG_MINIX_FS_NATIVE_ENDIAN is not set 
    34 CONFIG_NEED_DMA_MAP_STATE=y 
    35 CONFIG_NEED_PER_CPU_KM=y 
     22# CONFIG_LANTIQ_VRX200 is not set 
     23CONFIG_MDIO_BOARDINFO=y 
     24# CONFIG_MLX4_CORE is not set 
    3625CONFIG_PCI=y 
     26# CONFIG_PCIEPORTBUS is not set 
     27# CONFIG_PCIE_LANTIQ is not set 
    3728CONFIG_PCI_DOMAINS=y 
    38 CONFIG_PERF_USE_VMALLOC=y 
    39 # CONFIG_PREEMPT_RCU is not set 
    40 # CONFIG_QUOTACTL is not set 
     29CONFIG_PCI_LANTIQ=y 
     30# CONFIG_PCI_LANTIQ_NONE is not set 
    4131CONFIG_RTL8306_PHY=y 
    4232# CONFIG_SOC_AMAZON_SE is not set 
    4333# CONFIG_SOC_FALCON is not set 
    44 # CONFIG_SOC_VR9 is not set 
    4534CONFIG_SOC_TYPE_XWAY=y 
    4635CONFIG_SOC_XWAY=y 
    47 CONFIG_SPI=y 
    48 CONFIG_SPI_BITBANG=y 
    49 # CONFIG_SPI_GPIO is not set 
    50 CONFIG_SPI_LANTIQ=y 
    51 CONFIG_SPI_MASTER=y 
     36CONFIG_USB_ARCH_HAS_XHCI=y 
    5237CONFIG_USB_SUPPORT=y 
    53 CONFIG_XZ_DEC=y 
    54 CONFIG_SPI_XWAY=y 
  • trunk/target/linux/lantiq/falcon/config-default

    r28405 r31060  
    1 CONFIG_CPU_MIPSR2_IRQ_EI=y 
    2 CONFIG_CPU_MIPSR2_IRQ_VI=y 
    3 CONFIG_IFX_VPE_CACHE_SPLIT=y 
    4 CONFIG_IFX_VPE_EXT=y 
     1# CONFIG_ATMEL_PWM is not set 
     2CONFIG_CLKDEV_LOOKUP=y 
     3CONFIG_FSNOTIFY=y 
     4CONFIG_HAVE_MACH_CLKDEV=y 
     5CONFIG_IRQ_FORCED_THREADING=y 
    56CONFIG_M25PXX_USE_FAST_READ=y 
    6 CONFIG_MIPS_MT=y 
    7 # CONFIG_MIPS_VPE_APSP_API is not set 
    8 CONFIG_MIPS_VPE_LOADER=y 
    9 CONFIG_MIPS_VPE_LOADER_TOM=y 
    107CONFIG_MTD_M25P80=y 
    118CONFIG_MTD_NAND=y 
     
    1310CONFIG_MTD_NAND_PLATFORM=y 
    1411# CONFIG_MTD_SM_COMMON is not set 
    15 CONFIG_MTSCHED=y 
    16 # CONFIG_PERFCTRS is not set 
    1712# CONFIG_SOC_AMAZON_SE is not set 
    1813CONFIG_SOC_FALCON=y 
    1914# CONFIG_SOC_TYPE_XWAY is not set 
    2015# CONFIG_SOC_XWAY is not set 
    21 # CONFIG_SOC_VR9 is not set 
    2216CONFIG_SPI=y 
    2317# CONFIG_SPI_BITBANG is not set 
     
    2519# CONFIG_SPI_GPIO is not set 
    2620CONFIG_SPI_MASTER=y 
    27 # CONFIG_I2C_DESIGNWARE is not set 
    28  
  • trunk/target/linux/lantiq/files-3.2/arch/mips/lantiq/falcon/addon-easy98000.c

    r31059 r31060  
    1111 
    1212#include <linux/kernel.h> 
     13#include <linux/module.h> 
    1314#include <linux/version.h> 
    1415#include <linux/types.h> 
  • trunk/target/linux/lantiq/files-3.2/arch/mips/lantiq/falcon/dev-leds-easy98000-cpld.c

    r31059 r31060  
    1515#include <linux/init.h> 
    1616#include <linux/platform_device.h> 
     17#include <linux/module.h> 
    1718#include <linux/errno.h> 
    1819#include <linux/leds.h> 
  • trunk/target/linux/lantiq/files-3.2/arch/mips/lantiq/xway/mach-arv.c

    r31059 r31060  
    1818#include <linux/etherdevice.h> 
    1919#include <linux/ath5k_platform.h> 
     20#include <linux/ath9k_platform.h> 
    2021#include <linux/pci.h> 
    2122 
     
    2728#include "../machtypes.h" 
    2829#include "dev-wifi-rt2x00.h" 
    29 #include "dev-wifi-ath5k.h" 
     30#include "dev-wifi-athxk.h" 
    3031#include "devices.h" 
    3132#include "dev-dwc_otg.h" 
    32  
    33 static struct mtd_partition arv4510_partitions[] = 
     33#include "pci-ath-fixup.h" 
     34 
     35static struct mtd_partition arv45xx_brnboot_partitions[] = 
     36{ 
     37        { 
     38                .name   = "brn-boot", 
     39                .offset = 0x0, 
     40                .size   = 0x20000, 
     41        }, 
     42        { 
     43                .name   = "config", 
     44                .offset = 0x20000, 
     45                .size   = 0x30000, 
     46        }, 
     47        { 
     48                .name   = "linux", 
     49                .offset = 0x50000, 
     50                .size   = 0x390000, 
     51        }, 
     52        { 
     53                .name   = "reserved", /* 12-byte signature at 0x3efff4 :/ */ 
     54                .offset = 0x3e0000, 
     55                .size   = 0x010000, 
     56        }, 
     57        { 
     58                .name   = "eeprom", 
     59                .offset = 0x3f0000, 
     60                .size   = 0x10000, 
     61        }, 
     62}; 
     63 
     64static struct mtd_partition arv75xx_brnboot_partitions[] = 
     65{ 
     66        { 
     67                .name   = "brn-boot", 
     68                .offset = 0x0, 
     69                .size   = 0x20000, 
     70        }, 
     71        { 
     72                .name   = "config", 
     73                .offset = 0x20000, 
     74                .size   = 0x40000, 
     75        }, 
     76        { 
     77                .name   = "linux", 
     78                .offset = 0x440000, 
     79                .size   = 0x3a0000, 
     80        }, 
     81        { 
     82                .name   = "reserved", /* 12-byte signature at 0x7efff4 :/ */ 
     83                .offset = 0x7e0000, 
     84                .size   = 0x010000, 
     85        }, 
     86        { 
     87                .name   = "board_config", 
     88                .offset = 0x7f0000, 
     89                .size   = 0x10000, 
     90        }, 
     91}; 
     92 
     93/* 
     94 * this is generic configuration for all arv based boards, note that it can be 
     95 * rewriten in arv_load_nor() 
     96 */ 
     97static struct mtd_partition arv_partitions[] = 
    3498{ 
    3599        { 
     
    41105                .name   = "uboot_env", 
    42106                .offset = 0x20000, 
    43                 .size   = 0x120000, 
    44         }, 
    45         { 
    46                 .name   = "linux", 
    47                 .offset = 0x40000, 
    48                 .size   = 0xfa0000, 
    49         }, 
    50         { 
    51                 .name   = "board_config", 
    52                 .offset = 0xfe0000, 
    53                 .size   = 0x20000, 
    54         }, 
    55 }; 
    56  
    57 static struct mtd_partition arv45xx_partitions[] = 
    58 { 
    59         { 
    60                 .name   = "uboot", 
    61                 .offset = 0x0, 
    62                 .size   = 0x20000, 
    63         }, 
    64         { 
    65                 .name   = "uboot_env", 
    66                 .offset = 0x20000, 
    67107                .size   = 0x10000, 
    68108        }, 
     
    79119}; 
    80120 
    81 static struct mtd_partition arv45xx_brnboot_partitions[] = 
    82 { 
    83         { 
    84                 .name   = "brn-boot", 
    85                 .offset = 0x0, 
    86                 .size   = 0x20000, 
    87         }, 
    88         { 
    89                 .name   = "config", 
    90                 .offset = 0x20000, 
    91                 .size   = 0x30000, 
    92         }, 
    93         { 
    94                 .name   = "linux", 
    95                 .offset = 0x50000, 
    96                 .size   = 0x390000, 
    97         }, 
    98         { 
    99                 .name   = "reserved", /* 12-byte signature at 0x3efff4 :/ */ 
    100                 .offset = 0x3e0000, 
    101                 .size   = 0x010000, 
    102         }, 
    103         { 
    104                 .name   = "eeprom", 
    105                 .offset = 0x3f0000, 
    106                 .size   = 0x10000, 
    107         }, 
    108 }; 
    109  
    110 static struct mtd_partition arv7525_partitions[] = 
    111 { 
    112         { 
    113                 .name   = "uboot", 
    114                 .offset = 0x0, 
    115                 .size   = 0x10000, 
    116         }, 
    117         { 
    118                 .name   = "uboot_env", 
    119                 .offset = 0x10000, 
    120                 .size   = 0x10000, 
    121         }, 
    122         { 
    123                 .name   = "linux", 
    124                 .offset = 0x20000, 
    125                 .size   = 0x3d0000, 
    126         }, 
    127         { 
    128                 .name   = "board_config", 
    129                 .offset = 0x3f0000, 
    130                 .size   = 0x10000, 
    131         }, 
    132 }; 
    133  
    134 static struct mtd_partition arv75xx_partitions[] = 
    135 { 
    136         { 
    137                 .name   = "uboot", 
    138                 .offset = 0x0, 
    139                 .size   = 0x10000, 
    140         }, 
    141         { 
    142                 .name   = "uboot_env", 
    143                 .offset = 0x10000, 
    144                 .size   = 0x10000, 
    145         }, 
    146         { 
    147                 .name   = "linux", 
    148                 .offset = 0x20000, 
    149                 .size   = 0x7d0000, 
    150         }, 
    151         { 
    152                 .name   = "board_config", 
    153                 .offset = 0x7f0000, 
    154                 .size   = 0x10000, 
    155         }, 
    156 }; 
    157  
    158 static struct physmap_flash_data arv4510_flash_data = { 
    159         .nr_parts       = ARRAY_SIZE(arv4510_partitions), 
    160         .parts          = arv4510_partitions, 
    161 }; 
    162  
    163 static struct physmap_flash_data arv45xx_flash_data = { 
    164         .nr_parts       = ARRAY_SIZE(arv45xx_partitions), 
    165         .parts          = arv45xx_partitions, 
    166 }; 
    167  
    168121static struct physmap_flash_data arv45xx_brnboot_flash_data = { 
    169122        .nr_parts       = ARRAY_SIZE(arv45xx_brnboot_partitions), 
     
    171124}; 
    172125 
    173 static struct physmap_flash_data arv7525_flash_data = { 
    174         .nr_parts       = ARRAY_SIZE(arv7525_partitions), 
    175         .parts          = arv7525_partitions, 
    176 }; 
    177  
    178 static struct physmap_flash_data arv75xx_flash_data = { 
    179         .nr_parts       = ARRAY_SIZE(arv75xx_partitions), 
    180         .parts          = arv75xx_partitions, 
    181 }; 
     126static struct physmap_flash_data arv75xx_brnboot_flash_data = { 
     127        .nr_parts       = ARRAY_SIZE(arv75xx_brnboot_partitions), 
     128        .parts          = arv75xx_brnboot_partitions, 
     129}; 
     130 
     131static struct physmap_flash_data arv_flash_data = { 
     132        .nr_parts       = ARRAY_SIZE(arv_partitions), 
     133        .parts          = arv_partitions, 
     134}; 
     135 
     136static void arv_load_nor(unsigned int max) 
     137{ 
     138#define UBOOT_MAGIC     0x27051956 
     139 
     140        int i; 
     141        int sector = -1; 
     142 
     143        if (ltq_brn_boot) { 
     144                if (max == 0x800000) 
     145                        ltq_register_nor(&arv75xx_brnboot_flash_data); 
     146                else 
     147                        ltq_register_nor(&arv45xx_brnboot_flash_data); 
     148                return; 
     149        } 
     150 
     151        for (i = 1; i < 4 && sector < 0; i++) { 
     152                unsigned int uboot_magic; 
     153                memcpy_fromio(&uboot_magic, (void *)KSEG1ADDR(LTQ_FLASH_START) + (i * 0x10000), 4); 
     154                if (uboot_magic == UBOOT_MAGIC) 
     155                        sector = i; 
     156        } 
     157 
     158        if (sector < 0) 
     159                return; 
     160 
     161        arv_partitions[0].size = arv_partitions[1].offset = (sector - 1) * 0x10000; 
     162        arv_partitions[2].offset = arv_partitions[0].size + 0x10000; 
     163        arv_partitions[2].size = max - arv_partitions[2].offset - 0x10000; 
     164        arv_partitions[3].offset = max - 0x10000; 
     165        ltq_register_nor(&arv_flash_data); 
     166} 
    182167 
    183168static struct ltq_pci_data ltq_pci_data = { 
     
    237222                .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
    238223                .gpio           = 29, 
     224                .active_low     = 1, 
     225        }, 
     226}; 
     227 
     228static struct gpio_led 
     229arv4519pw_gpio_leds[] __initdata = { 
     230        { .name = "soc:red:power", .gpio = 7, .active_low = 1, }, 
     231        { .name = "soc:green:power", .gpio = 2, .active_low = 1, .default_trigger = "default-on" }, 
     232        { .name = "soc:green:wifi", .gpio = 6, .active_low = 1, }, 
     233        { .name = "soc:green:adsl", .gpio = 4, .active_low = 1, }, 
     234        { .name = "soc:green:internet", .gpio = 5, .active_low = 1, }, 
     235        { .name = "soc:red:internet", .gpio = 8, .active_low = 1, }, 
     236        { .name = "soc:green:voip", .gpio = 100, .active_low = 1, }, 
     237        { .name = "soc:green:phone1", .gpio = 101, .active_low = 1, }, 
     238        { .name = "soc:green:phone2", .gpio = 102, .active_low = 1, }, 
     239        { .name = "soc:green:fxo", .gpio = 103, .active_low = 1, }, 
     240        { .name = "soc:green:usb", .gpio = 19, .active_low = 1, }, 
     241        { .name = "soc:orange:wps", .gpio = 104, .active_low = 1, }, 
     242        { .name = "soc:green:wps", .gpio = 105, .active_low = 1, }, 
     243        { .name = "soc:red:wps", .gpio = 106, .active_low = 1, }, 
     244 
     245}; 
     246 
     247static struct gpio_keys_button 
     248arv4519pw_gpio_keys[] __initdata = { 
     249        { 
     250                .desc           = "reset", 
     251                .type           = EV_KEY, 
     252                .code           = BTN_1, 
     253                .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
     254                .gpio           = 30, 
     255                .active_low     = 1, 
     256        }, 
     257        { 
     258                .desc           = "wlan", 
     259                .type           = EV_KEY, 
     260                .code           = BTN_2, 
     261                .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
     262                .gpio           = 28, 
    239263                .active_low     = 1, 
    240264        }, 
     
    286310}; 
    287311 
    288 #define ARV4525PW_PHYRESET 13 
    289 #define ARV4525PW_RELAY    31 
     312#define ARV4525PW_PHYRESET      13 
     313#define ARV4525PW_RELAY         31 
    290314 
    291315static struct gpio arv4525pw_gpios[] __initdata = { 
     
    333357        }, 
    334358        { 
    335                 .desc           = "btn2", 
    336                 .type           = EV_KEY, 
    337                 .code           = BTN_2, 
    338                 .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
    339                 .gpio           = 28, 
    340                 .active_low     = 1, 
     359                .desc           = "btn2", 
     360                .type           = EV_KEY, 
     361                .code           = BTN_2, 
     362                .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
     363                .gpio           = 28, 
     364                .active_low     = 1, 
    341365        }, 
    342366}; 
     
    344368static struct gpio_led 
    345369arv7518pw_gpio_leds[] __initdata = { 
    346         { .name = "soc:green:power", .gpio = 2, .active_low = 1, }, 
     370        { .name = "soc:red:power", .gpio = 7, .active_low = 1, }, 
     371        { .name = "soc:green:power", .gpio = 2, .active_low = 1, .default_trigger = "default-on" }, 
     372        { .name = "soc:green:wifi", .gpio = 6, .active_low = 1, }, 
    347373        { .name = "soc:green:adsl", .gpio = 4, .active_low = 1, }, 
    348374        { .name = "soc:green:internet", .gpio = 5, .active_low = 1, }, 
    349         { .name = "soc:green:wifi", .gpio = 6, .active_low = 1, }, 
    350375        { .name = "soc:red:internet", .gpio = 8, .active_low = 1, }, 
     376        { .name = "soc:green:voip", .gpio = 100, .active_low = 1, }, 
     377        { .name = "soc:green:phone1", .gpio = 101, .active_low = 1, }, 
     378        { .name = "soc:green:phone2", .gpio = 102, .active_low = 1, }, 
     379        { .name = "soc:orange:fail", .gpio = 103, .active_low = 1, }, 
    351380        { .name = "soc:green:usb", .gpio = 19, .active_low = 1, }, 
     381        { .name = "soc:orange:wps", .gpio = 104, .active_low = 1, }, 
     382        { .name = "soc:green:wps", .gpio = 105, .active_low = 1, }, 
     383        { .name = "soc:red:wps", .gpio = 106, .active_low = 1, }, 
     384 
    352385}; 
    353386 
    354387static struct gpio_keys_button 
    355388arv7518pw_gpio_keys[] __initdata = { 
    356         { 
     389        /*{ 
    357390                .desc           = "reset", 
    358391                .type           = EV_KEY, 
    359                 .code           = BTN_0, 
     392                .code           = BTN_1, 
    360393                .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
    361394                .gpio           = 23, 
    362395                .active_low     = 1, 
    363         }, 
     396        },*/ 
    364397        { 
    365398                .desc           = "wifi", 
    366399                .type           = EV_KEY, 
    367                 .code           = BTN_1, 
     400                .code           = BTN_2, 
    368401                .debounce_interval = LTQ_KEYS_DEBOUNCE_INTERVAL, 
    369402                .gpio           = 25, 
     
    385418 
    386419static void 
    387 arv45xx_register_ethernet(void) 
    388 { 
    389 #define ARV45XX_BRN_MAC                 0x3f0016 
     420arv_register_ethernet(unsigned int mac_addr) 
     421{ 
    390422        memcpy_fromio(&ltq_eth_data.mac.sa_data, 
    391                 (void *)KSEG1ADDR(LTQ_FLASH_START + ARV45XX_BRN_MAC), 6); 
     423                (void *)KSEG1ADDR(LTQ_FLASH_START + mac_addr), 6); 
    392424        ltq_register_etop(&ltq_eth_data); 
    393425} 
    394426 
    395 static void 
    396 arv75xx_register_ethernet(void) 
    397 { 
    398 #define ARV75XX_BRN_MAC                 0x7f0016 
    399         memcpy_fromio(&ltq_eth_data.mac.sa_data, 
    400                 (void *)KSEG1ADDR(LTQ_FLASH_START + ARV75XX_BRN_MAC), 6); 
    401         ltq_register_etop(&ltq_eth_data); 
    402 } 
    403  
    404 static void 
    405 bewan_register_ethernet(void) 
    406 { 
    407 #define BEWAN_BRN_MAC                   0x3f0014 
    408         memcpy_fromio(&ltq_eth_data.mac.sa_data, 
    409                 (void *)KSEG1ADDR(LTQ_FLASH_START + BEWAN_BRN_MAC), 6); 
    410         ltq_register_etop(&ltq_eth_data); 
    411 } 
    412  
    413 static u16 arv45xx_ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]; 
    414 static u8 arv45xx_ath5k_eeprom_mac[6]; 
     427static u16 arv_ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]; 
     428static u16 arv_ath9k_eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS]; 
     429static u8 arv_athxk_eeprom_mac[6]; 
    415430 
    416431void __init 
    417 arv45xx_register_ath5k(void) 
    418 { 
    419 #define ARV45XX_BRN_ATH         0x3f0478 
     432arv_register_ath5k(unsigned int ath_addr, unsigned int mac_addr) 
     433{ 
    420434        int i; 
    421         static u16 eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]; 
    422         u32 *p = (u32*)arv45xx_ath5k_eeprom_data; 
    423  
    424         memcpy_fromio(arv45xx_ath5k_eeprom_mac, 
    425                 (void *)KSEG1ADDR(LTQ_FLASH_START + ARV45XX_BRN_MAC), 6); 
    426         arv45xx_ath5k_eeprom_mac[5]++; 
    427         memcpy_fromio(arv45xx_ath5k_eeprom_data, 
    428                 (void *)KSEG1ADDR(LTQ_FLASH_START + ARV45XX_BRN_ATH), ATH5K_PLAT_EEP_MAX_WORDS); 
     435 
     436        memcpy_fromio(arv_athxk_eeprom_mac, 
     437                (void *)KSEG1ADDR(LTQ_FLASH_START + mac_addr), 6); 
     438        arv_athxk_eeprom_mac[5]++; 
     439        memcpy_fromio(arv_ath5k_eeprom_data, 
     440                (void *)KSEG1ADDR(LTQ_FLASH_START + ath_addr), ATH5K_PLAT_EEP_MAX_WORDS); 
    429441        // swap eeprom bytes 
    430         for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS>>1; i++){ 
    431                 //arv4518_ath5k_eeprom_data[i] = ((eeprom_data[i]&0xff)<<8)|((eeprom_data[i]&0xff00)>>8); 
    432                 p[i] = ((eeprom_data[(i<<1)+1]&0xff)<<24)|((eeprom_data[(i<<1)+1]&0xff00)<<8)|((eeprom_data[i<<1]&0xff)<<8)|((eeprom_data[i<<1]&0xff00)>>8); 
    433                 if (i == 0xbf>>1){ 
    434                         // printk ("regdomain: 0x%x --> 0x%x\n", p[i], (p[i] & 0xffff0000)|0x67); 
    435                         /* regdomain is invalid?? how did original fw convert  
    436                         * value to 0x82d4 ?? 
    437                         * for now, force to 0x67 */ 
    438                         p[i] &= 0xffff0000; 
    439                         p[i] |= 0x67; 
     442        for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS>>1; i++) { 
     443                arv_ath5k_eeprom_data[i] = swab16(arv_ath5k_eeprom_data[i]); 
     444                if (i == 0x17e>>1) { 
     445                        /* 
     446                         * regdomain is invalid. it's unknown how did original 
     447                         * fw convered value to 0x82d4 so for now force to 0x67 
     448                         */ 
     449                        arv_ath5k_eeprom_data[i] &= 0x0000; 
     450                        arv_ath5k_eeprom_data[i] |= 0x67; 
    440451                } 
    441452        } 
    442453} 
    443454 
     455void __init 
     456arv_register_ath9k(unsigned int ath_addr, unsigned int mac_addr) 
     457{ 
     458        int i; 
     459        u16 *eepdata, sum, el; 
     460 
     461        memcpy_fromio(arv_athxk_eeprom_mac, 
     462                (void *)KSEG1ADDR(LTQ_FLASH_START + mac_addr), 6); 
     463        arv_athxk_eeprom_mac[5]++; 
     464        memcpy_fromio(arv_ath9k_eeprom_data, 
     465                (void *)KSEG1ADDR(LTQ_FLASH_START + ath_addr), ATH9K_PLAT_EEP_MAX_WORDS); 
     466 
     467        // force regdomain to 0x67 
     468        arv_ath9k_eeprom_data[0x208>>1] = 0x67; 
     469 
     470        // calculate new checksum 
     471        sum = arv_ath9k_eeprom_data[0x200>>1]; 
     472        el = sum / sizeof(u16) - 2;  /* skip length and (old) checksum */ 
     473        eepdata = (u16 *) (&arv_ath9k_eeprom_data[0x204>>1]); /* after checksum */ 
     474        for (i = 0; i < el; i++) 
     475                sum ^= *eepdata++; 
     476        sum ^= 0xffff; 
     477        arv_ath9k_eeprom_data[0x202>>1] = sum; 
     478} 
     479 
    444480static void __init 
    445481arv3527p_init(void) 
    446482{ 
     483#define ARV3527P_MAC_ADDR               0x3f0016 
     484 
    447485        ltq_register_gpio_stp(); 
    448486        //ltq_add_device_gpio_leds(arv3527p_gpio_leds, ARRAY_SIZE(arv3527p_gpio_leds)); 
    449         ltq_register_nor(&arv45xx_flash_data); 
    450         arv45xx_register_ethernet(); 
     487        arv_load_nor(0x400000); 
     488        arv_register_ethernet(ARV3527P_MAC_ADDR); 
    451489} 
    452490 
     
    459497arv4510pw_init(void) 
    460498{ 
     499#define ARV4510PW_MAC_ADDR              0x3f0014 
     500 
    461501        ltq_register_gpio_stp(); 
    462502        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4510pw_gpio_leds), arv4510pw_gpio_leds); 
    463         ltq_register_nor(&arv4510_flash_data); 
     503        arv_load_nor(0x400000); 
    464504        ltq_pci_data.irq[12] = (INT_NUM_IM2_IRL0 + 31); 
    465505        ltq_pci_data.irq[15] = (INT_NUM_IM0_IRL0 + 26); 
    466506        ltq_pci_data.gpio |= PCI_EXIN2 | PCI_REQ2; 
    467507        ltq_register_pci(&ltq_pci_data); 
    468         bewan_register_ethernet(); 
     508        arv_register_ethernet(ARV4510PW_MAC_ADDR); 
    469509} 
    470510 
     
    480520#define ARV4518PW_USB                   14 
    481521#define ARV4518PW_SWITCH_RESET          13 
    482 #define ARV4518PW_MADWIFI_ADDR          0xb07f0400 
     522#define ARV4518PW_ATH_ADDR              0x3f0400 
     523#define ARV4518PW_MADWIFI_ADDR          0xb03f0400 
     524#define ARV4518PW_MAC_ADDR              0x3f0016 
    483525 
    484526        ltq_register_gpio_ebu(ARV4518PW_EBU); 
     
    486528        ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, 
    487529                                ARRAY_SIZE(arv4518pw_gpio_keys), arv4518pw_gpio_keys); 
    488         ltq_register_nor(&arv45xx_flash_data); 
     530        arv_load_nor(0x400000); 
    489531        ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ2; 
    490532        ltq_register_pci(&ltq_pci_data); 
    491         ltq_register_madwifi_eep(ARV4518PW_MADWIFI_ADDR); 
    492         ltq_register_ath5k(arv45xx_ath5k_eeprom_data, arv45xx_ath5k_eeprom_mac); 
    493533        xway_register_dwc(ARV4518PW_USB); 
    494         arv45xx_register_ethernet(); 
     534        arv_register_ethernet(ARV4518PW_MAC_ADDR); 
     535        arv_register_ath5k(ARV4518PW_ATH_ADDR, ARV4518PW_MAC_ADDR); 
     536        ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac); 
    495537 
    496538        gpio_request(ARV4518PW_SWITCH_RESET, "switch"); 
     
    505547 
    506548static void __init 
     549arv4519pw_init(void) 
     550{ 
     551#define ARV4519PW_EBU                   0 
     552#define ARV4519PW_USB                   14 
     553#define ARV4519PW_RELAY                 31 
     554#define ARV4519PW_SWITCH_RESET          13 
     555#define ARV4519PW_ATH_ADDR              0x3f0400 
     556#define ARV4519PW_MAC_ADDR              0x3f0016 
     557 
     558        arv_load_nor(0x400000); 
     559        ltq_register_gpio_ebu(ARV4519PW_EBU); 
     560        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4519pw_gpio_leds), arv4519pw_gpio_leds); 
     561        ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, 
     562                                ARRAY_SIZE(arv4519pw_gpio_keys), arv4519pw_gpio_keys); 
     563        ltq_pci_data.gpio = PCI_GNT2 | PCI_REQ1; 
     564        ltq_register_pci(&ltq_pci_data); 
     565        xway_register_dwc(ARV4519PW_USB); 
     566        arv_register_ethernet(ARV4519PW_MAC_ADDR); 
     567        arv_register_ath5k(ARV4519PW_ATH_ADDR, ARV4519PW_MAC_ADDR); 
     568        ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac); 
     569 
     570        gpio_request(ARV4519PW_RELAY, "relay"); 
     571        gpio_direction_output(ARV4519PW_RELAY, 1); 
     572        gpio_export(ARV4519PW_RELAY, 0); 
     573 
     574        gpio_request(ARV4519PW_SWITCH_RESET, "switch"); 
     575        gpio_set_value(ARV4519PW_SWITCH_RESET, 1); 
     576        gpio_export(ARV4519PW_SWITCH_RESET, 0); 
     577} 
     578 
     579MIPS_MACHINE(LANTIQ_MACH_ARV4519PW, 
     580                        "ARV4519PW", 
     581                        "ARV4519PW - Vodafone, Pirelli", 
     582                        arv4519pw_init); 
     583 
     584static void __init 
    507585arv4520pw_init(void) 
    508586{ 
     
    510588#define ARV4520PW_USB                   28 
    511589#define ARV4520PW_SWITCH_RESET          110 
     590#define ARV4520PW_MAC_ADDR              0x3f0016 
    512591 
    513592        ltq_register_gpio_ebu(ARV4520PW_EBU); 
    514593        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4520pw_gpio_leds), arv4520pw_gpio_leds); 
    515         ltq_register_nor(&arv45xx_flash_data); 
     594        arv_load_nor(0x400000); 
    516595        ltq_register_pci(&ltq_pci_data); 
    517596        ltq_register_tapi(); 
    518         arv45xx_register_ethernet(); 
     597        arv_register_ethernet(ARV4520PW_MAC_ADDR); 
    519598        xway_register_dwc(ARV4520PW_USB); 
    520599 
     
    536615#define ARV452CPW_RELAY2                107 
    537616#define ARV452CPW_SWITCH_RESET          110 
    538 #define ARV452CPW_MADWIFI_ADDR          0xb07f0400 
     617#define ARV452CPW_ATH_ADDR              0x3f0400 
     618#define ARV452CPW_MADWIFI_ADDR          0xb03f0400 
     619#define ARV452CPW_MAC_ADDR              0x3f0016 
    539620 
    540621        ltq_register_gpio_ebu(ARV452CPW_EBU); 
    541622        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv452cpw_gpio_leds), arv452cpw_gpio_leds); 
    542         ltq_register_nor(&arv45xx_flash_data); 
    543         ltq_register_pci(&ltq_pci_data); 
    544         ltq_register_madwifi_eep(ARV452CPW_MADWIFI_ADDR); 
     623        arv_load_nor(0x400000); 
     624        ltq_register_pci(&ltq_pci_data); 
    545625        xway_register_dwc(ARV452CPW_USB); 
    546         arv45xx_register_ethernet(); 
    547         arv45xx_register_ath5k(); 
     626        arv_register_ethernet(ARV452CPW_MAC_ADDR); 
     627        arv_register_ath5k(ARV452CPW_ATH_ADDR, ARV452CPW_MAC_ADDR); 
     628        ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac); 
    548629 
    549630        gpio_request(ARV452CPW_SWITCH_RESET, "switch"); 
     
    568649arv4525pw_init(void) 
    569650{ 
     651#define ARV4525PW_ATH_ADDR              0x3f0400 
    570652#define ARV4525PW_MADWIFI_ADDR          0xb03f0400 
    571         if (ltq_brn_boot) 
    572                 ltq_register_nor(&arv45xx_brnboot_flash_data); 
    573         else 
    574                 ltq_register_nor(&arv45xx_flash_data); 
    575  
     653#define ARV4525PW_MAC_ADDR              0x3f0016 
     654 
     655        arv_load_nor(0x400000); 
    576656        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4525pw_gpio_leds), arv4525pw_gpio_leds); 
    577657        gpio_request_array(arv4525pw_gpios, ARRAY_SIZE(arv4525pw_gpios)); 
     
    580660        ltq_pci_data.clock = PCI_CLOCK_INT; 
    581661        ltq_register_pci(&ltq_pci_data); 
    582         ltq_register_madwifi_eep(ARV4525PW_MADWIFI_ADDR); 
    583         arv45xx_register_ath5k(); 
    584         ltq_register_ath5k(arv45xx_ath5k_eeprom_data, arv45xx_ath5k_eeprom_mac); 
     662        arv_register_ath5k(ARV4525PW_ATH_ADDR, ARV4525PW_MADWIFI_ADDR); 
     663        ltq_register_ath5k(arv_ath5k_eeprom_data, arv_athxk_eeprom_mac); 
    585664        ltq_eth_data.mii_mode = PHY_INTERFACE_MODE_MII; 
    586         arv45xx_register_ethernet(); 
     665        arv_register_ethernet(ARV4525PW_MAC_ADDR); 
    587666} 
    588667 
     
    595674arv7525pw_init(void) 
    596675{ 
     676#define ARV7525P_MAC_ADDR       0x3f0016 
     677 
     678        arv_load_nor(0x400000); 
    597679        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv4525pw_gpio_leds), arv4525pw_gpio_leds); 
    598         ltq_register_nor(&arv7525_flash_data); 
    599680        ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, 
    600681                                ARRAY_SIZE(arv7525pw_gpio_keys), arv7525pw_gpio_keys); 
     
    606687        ltq_register_rt2x00("RT2860.eeprom"); 
    607688        ltq_register_tapi(); 
    608         arv45xx_register_ethernet(); 
     689        arv_register_ethernet(ARV7525P_MAC_ADDR); 
    609690} 
    610691 
     
    619700#define ARV7518PW_EBU                   0x2 
    620701#define ARV7518PW_USB                   14 
    621  
     702#define ARV7518PW_SWITCH_RESET          13 
     703#define ARV7518PW_ATH_ADDR              0x7f0400 
     704#define ARV7518PW_MAC_ADDR              0x7f0016 
     705 
     706        arv_load_nor(0x800000); 
    622707        ltq_register_gpio_ebu(ARV7518PW_EBU); 
    623708        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv7518pw_gpio_leds), arv7518pw_gpio_leds); 
    624709        ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, 
    625710                                ARRAY_SIZE(arv7518pw_gpio_keys), arv7518pw_gpio_keys); 
    626         ltq_register_nor(&arv75xx_flash_data); 
    627711        ltq_register_pci(&ltq_pci_data); 
    628712        ltq_register_tapi(); 
    629713        xway_register_dwc(ARV7518PW_USB); 
    630         arv75xx_register_ethernet(); 
    631         //arv7518_register_ath9k(mac); 
     714        arv_register_ethernet(ARV7518PW_MAC_ADDR); 
     715        arv_register_ath9k(ARV7518PW_ATH_ADDR, ARV7518PW_MAC_ADDR); 
     716        ltq_register_ath9k(arv_ath9k_eeprom_data, arv_athxk_eeprom_mac); 
     717        ltq_pci_ath_fixup(14, arv_ath9k_eeprom_data); 
     718 
     719        gpio_request(ARV7518PW_SWITCH_RESET, "switch"); 
     720        gpio_direction_output(ARV7518PW_SWITCH_RESET, 1); 
     721        gpio_export(ARV7518PW_SWITCH_RESET, 0); 
    632722} 
    633723 
     
    643733#define ARV752DPW22_USB                 100 
    644734#define ARV752DPW22_RELAY               101 
    645  
     735#define ARV752DPW22_MAC_ADDR            0x7f0016 
     736 
     737        arv_load_nor(0x800000); 
    646738        ltq_register_gpio_ebu(ARV752DPW22_EBU); 
    647739        ltq_add_device_gpio_leds(-1, ARRAY_SIZE(arv752dpw22_gpio_leds), arv752dpw22_gpio_leds); 
    648740        ltq_register_gpio_keys_polled(-1, LTQ_KEYS_POLL_INTERVAL, 
    649741                                ARRAY_SIZE(arv752dpw22_gpio_keys), arv752dpw22_gpio_keys); 
    650         ltq_register_nor(&arv75xx_flash_data); 
    651742        ltq_pci_data.irq[15] = (INT_NUM_IM3_IRL0 + 31); 
    652743        ltq_pci_data.gpio |= PCI_EXIN1 | PCI_REQ2; 
    653744        ltq_register_pci(&ltq_pci_data); 
    654745        xway_register_dwc(ARV752DPW22_USB); 
    655         arv75xx_register_ethernet(); 
     746        arv_register_ethernet(ARV752DPW22_MAC_ADDR); 
    656747 
    657748        gpio_request(ARV752DPW22_RELAY, "relay"); 
  • trunk/target/linux/lantiq/files-3.2/arch/mips/lantiq/xway/mach-gigasx76x.h

    r31059 r31060  
    99 */ 
    1010 
     11#ifndef _MACH_GIGASX76X_H__ 
     12#define _MACH_GIGASX76X_H__ 
     13 
    1114static u16 sx763_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]= 
    1215{ 
    13 0x5aa5,0x168c,0x0200,0x0001,0x0000,0x5001,0x0000,0x2051,0x2051,0x1c0a,0x0100, 
     160x0013,0x168c,0x0200,0x0001,0x0000,0x5001,0x0000,0x2051,0x2051,0x1c0a,0x0100, 
    14170x0000,0x01c2,0x0002,0xc606,0x0001,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000, 
    15180x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0xf165,0x7fbe,0x0003,0x0000, 
     
    109112static u16 sx762_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS]= 
    110113{ 
    111 0x5aa5,0x168c,0x0200,0x0001,0x0000,0x5001,0x0000,0x2051,0x2051,0x1c0a,0x0100, 
     1140x001a,0x168c,0x0200,0x0001,0x0000,0x5001,0x0000,0x2051,0x2051,0x1c0a,0x0100, 
    1121150x0000,0x01c2,0x0002,0xc606,0x0001,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000, 
    1131160x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0xf165,0x7fbe,0x0003,0x0000, 
     
    2022050xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff,0xffff, 
    2032060xffff,0xffff}; 
     207 
     208#endif 
  • trunk/target/linux/lantiq/files-3.2/arch/mips/lantiq/xway/mach-netgear.c

    r31059 r31060  
    1515#include <linux/phy.h> 
    1616#include <linux/spi/spi.h> 
     17#include <linux/spi/flash.h> 
    1718 
    1819#include <lantiq_soc.h> 
     
    3435}; 
    3536 
    36 struct spi_board_info spi_info = { 
    37         .bus_num        = 0, 
    38         .chip_select    = 3, 
    39         .max_speed_hz   = 25000000, 
    40         .modalias       = "mx25l12805d", 
     37static struct mtd_partition easy98000_nor_partitions[] = 
     38{ 
     39        { 
     40                .name   = "uboot", 
     41                .offset = 0x0, 
     42                .size   = 0x40000, 
     43        }, 
     44        { 
     45                .name   = "uboot_env", 
     46                .offset = 0x40000, 
     47                .size   = 0x40000,      /* 2 sectors for redundant env. */ 
     48        }, 
     49        { 
     50                .name   = "linux", 
     51                .offset = 0x80000, 
     52                .size   = 0xF80000,     /* map only 16 MiB */ 
     53        }, 
     54}; 
     55 
     56static struct flash_platform_data easy98000_spi_flash_platform_data = { 
     57        .name = "sflash", 
     58        .parts = easy98000_nor_partitions, 
     59        .nr_parts = ARRAY_SIZE(easy98000_nor_partitions) 
     60}; 
     61 
     62static struct spi_board_info spi_info __initdata = { 
     63        .modalias               = "m25p80", 
     64        .bus_num                = 0, 
     65        .chip_select            = 3, 
     66        .max_speed_hz           = 10 * 1000 * 1000, 
     67        .mode                   = SPI_MODE_3, 
     68        .platform_data          = &easy98000_spi_flash_platform_data 
    4169}; 
    4270 
  • trunk/target/linux/lantiq/image/Makefile

    r30532 r31060  
    11#  
    2 # Copyright (C) 2010 OpenWrt.org 
     2# Copyright (C) 2010-2012 OpenWrt.org 
    33# 
    44# This is free software, licensed under the GNU General Public License v2. 
     
    1313xway_cmdline=-console=ttyLTQ1,115200 rootfstype=squashfs,jffs2 
    1414falcon_cmdline=-console=ttyLTQ0,115200 rootfstype=squashfs,jffs2 
     15sx76x_cmdline=console=ttyLTQ1,115200 rootfstype=squashfs,jffs2 
    1516 
    1617define CompressLzma 
     
    3637endef 
    3738 
     39define MkImageEVA 
     40        lzma2eva 0x80002000 0x80002000 $(KDIR)/vmlinux-$(1).lzma $(KDIR)/$(1).eva.prealign 
     41        dd if=$(KDIR)/$(1).eva.prealign of=$(KDIR)/$(1).eva bs=64k conv=sync 
     42        cat ./eva.dummy.squashfs >> $(KDIR)/$(1).eva 
     43endef 
     44 
    3845define Image/Build/squashfs 
    3946        cat $(KDIR)/uImage-$(2) $(KDIR)/root.$(1) > $(BIN_DIR)/$(IMG_PREFIX)-$(2)-$(1).image 
     
    4249endef 
    4350 
     51define Image/BuildEVA/squashfs 
     52        cat $(KDIR)/$(2).eva $(KDIR)/root.$(1) > $(BIN_DIR)/$(IMG_PREFIX)-$(2)-$(1).image.eva 
     53        $(call prepare_generic_squashfs,$(BIN_DIR)/$(IMG_PREFIX)-$(2)-$(1).image.eva) 
     54endef 
     55 
    4456define Image/Build/jffs2-64k 
    4557        dd if=$(KDIR)/uImage-$(2) of=$(KDIR)/uImage-$(2)-$(1) bs=64k conv=sync 
     
    6375endef 
    6476 
     77define Image/BuildKernelEVA/Template 
     78        $(call PatchKernelLzma,$(1),$(if $(2),$(2) machtype=$(1),)) 
     79        $(call MkImageEVA,$(1)) 
     80        $(CP) $(KDIR)/$(1).eva $(BIN_DIR)/$(IMG_PREFIX)-$(1).eva 
     81endef 
     82 
    6583ifeq ($(CONFIG_TARGET_lantiq_danube),y) 
    6684define Image/BuildKernel/Profile/EASY50712 
     
    104122endef 
    105123 
     124define Image/BuildKernel/Profile/ARV4519PW 
     125        $(call Image/BuildKernel/Template,ARV4519PW,$(xway_cmdline)) 
     126endef 
     127 
     128define Image/Build/Profile/ARV4519PW 
     129        $(call Image/Build/$(1),$(1),ARV4519PW,BRNDA4519,0x12345678,memsize=32) 
     130endef 
     131 
    106132define Image/BuildKernel/Profile/ARV4520PW 
    107133        $(call Image/BuildKernel/Template,ARV4520PW,$(xway_cmdline)) 
     
    141167 
    142168define Image/Build/Profile/ARV7518PW 
    143         $(call Image/Build/$(1),$(1),ARV7518PW) 
     169        $(call Image/Build/$(1),$(1),ARV7518PW,BRNDA7519,0x12345678,memsize=64) 
    144170endef 
    145171 
     
    161187 
    162188define Image/BuildKernel/Profile/GIGASX76X 
    163         $(call Image/BuildKernel/Template,GIGASX76X,$(xway_cmdline)) 
     189        $(call Image/BuildKernel/Template,GIGASX76X,$(sx76x_cmdline)) 
    164190endef 
    165191 
    166192define Image/Build/Profile/GIGASX76X 
    167193        $(call Image/Build/$(1),$(1),GIGASX76X) 
     194endef 
     195 
     196define Image/BuildKernel/Profile/BTHOMEHUBV2B 
     197        $(call Image/BuildKernel/Template,BTHOMEHUBV2B,$(xway_cmdline)) 
     198endef 
     199 
     200define Image/Build/Profile/BTHOMEHUBV2B 
     201        $(call Image/Build/$(1),$(1),BTHOMEHUBV2B) 
     202endef 
     203 
     204define Image/BuildKernel/Profile/BTHOMEHUBV2BOPENRG 
     205        $(call Image/BuildKernel/Template,BTHOMEHUBV2BOPENRG,$(xway_cmdline)) 
     206endef 
     207 
     208define Image/Build/Profile/BTHOMEHUBV2BOPENRG 
     209        $(call Image/Build/$(1),$(1),BTHOMEHUBV2BOPENRG) 
    168210endef 
    169211 
     
    175217        $(call Image/BuildKernel/Template,ARV4510PW,$(xway_cmdline)) 
    176218        $(call Image/BuildKernel/Template,ARV4518PW,$(xway_cmdline)) 
     219        $(call Image/BuildKernel/Template,ARV4519PW,$(xway_cmdline)) 
    177220        $(call Image/BuildKernel/Template,ARV4520PW,$(xway_cmdline)) 
    178221        $(call Image/BuildKernel/Template,ARV452CPW,$(xway_cmdline)) 
     
    183226        $(call Image/BuildKernel/Template,ARV752DPW22,$(xway_cmdline)) 
    184227        $(call Image/BuildKernel/Template,GIGASX76X,$(xway_cmdline)) 
     228        $(call Image/BuildKernel/Template,BTHOMEHUBV2B,$(xway_cmdline)) 
     229        $(call Image/BuildKernel/Template,BTHOMEHUBV2BOPENRG,$(xway_cmdline)) 
    185230        $(call Image/BuildKernel/Template,NONE) 
    186231endef 
     
    193238        $(call Image/Build/$(1),$(1),ARV4510PW) 
    194239        $(call Image/Build/$(1),$(1),ARV4518PW) 
     240        $(call Image/Build/$(1),$(1),ARV4519PW,BRNDA4519,0x12345678,memsize=32) 
    195241        $(call Image/Build/$(1),$(1),ARV4520PW) 
    196242        $(call Image/Build/$(1),$(1),ARV452CPW) 
    197         $(call Image/Build/$(1),$(1),ARV4525PW) 
     243        $(call Image/Build/$(1),$(1),ARV4525PW,BRNDTW502,0x12345678,memsize=32) 
    198244        $(call Image/Build/$(1),$(1),ARV7525PW) 
    199         $(call Image/Build/$(1),$(1),ARV7518PW) 
     245        $(call Image/Build/$(1),$(1),ARV7518PW,BRNDA7519,0x12345678,memsize=32) 
    200246        $(call Image/Build/$(1),$(1),ARV752DPW) 
    201247        $(call Image/Build/$(1),$(1),ARV752DPW22) 
    202248        $(call Image/Build/$(1),$(1),GIGASX76X) 
     249        $(call Image/Build/$(1),$(1),BTHOMEHUBV2B) 
     250        $(call Image/Build/$(1),$(1),BTHOMEHUBV2BOPENRG) 
    203251        $(call Image/Build/$(1),$(1),NONE) 
    204252        $(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1).rootfs 
     
    223271endef 
    224272 
     273define Image/BuildKernel/Profile/FRITZ7320 
     274        $(call Image/BuildKernelEVA/Template,FRITZ7320,$(xway_cmdline)) 
     275endef 
     276 
     277define Image/Build/Profile/FRITZ7320 
     278        $(call Image/BuildEVA/$(1),$(1),FRITZ7320) 
     279endef 
     280 
    225281define Image/BuildKernel/Profile/Generic 
    226282        $(call Image/BuildKernel/Template,WBMR,$(xway_cmdline)) 
    227283        $(call Image/BuildKernel/Template,DGN3500B,$(xway_cmdline)) 
     284        $(call Image/BuildKernelEVA/Template,FRITZ7320,$(xway_cmdline)) 
    228285        $(call Image/BuildKernel/Template,NONE) 
    229286endef 
     
    232289        $(call Image/Build/$(1),$(1),WBMR) 
    233290        $(call Image/Build/$(1),$(1),DGN3500B) 
     291        $(call Image/BuildEVA/$(1),$(1),FRITZ7320) 
    234292        $(call Image/Build/$(1),$(1),NONE) 
    235293        $(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1).rootfs 
     
    289347endif 
    290348 
     349ifeq ($(CONFIG_TARGET_lantiq_vr9),y) 
     350define Image/BuildKernel/Profile/FRITZ3370 
     351        $(call Image/BuildKernel/Template,FRITZ3370,$(xway_cmdline)) 
     352        $(call Image/BuildKernelEVA/Template,FRITZ3370,$(xway_cmdline)) 
     353endef 
     354 
     355define Image/Build/Profile/FRITZ3370 
     356        $(call Image/Build/$(1),$(1),FRITZ3370) 
     357endef 
     358 
     359define Image/BuildKernel/Profile/Generic 
     360        $(call Image/BuildKernel/Template,FRITZ3370,$(xway_cmdline)) 
     361        $(call Image/BuildKernel/Template,NONE) 
     362endef 
     363 
     364define Image/Build/Profile/Generic 
     365        $(call Image/Build/$(1),$(1),FRITZ3370) 
     366        $(call Image/Build/$(1),$(1),NONE) 
     367        $(CP) $(KDIR)/root.$(1) $(BIN_DIR)/$(IMG_PREFIX)-$(1).rootfs 
     368endef 
     369endif 
     370 
    291371define Image/BuildKernel 
    292372        $(call Image/BuildKernel/Profile/$(PROFILE)) 
  • trunk/target/linux/lantiq/modules.mk

    r30940 r31060  
    3030  TITLE:=Synopsis DWC_OTG support 
    3131  SUBMENU:=$(USB_MENU) 
    32   DEPENDS+=@(TARGET_lantiq_danube||TARGET_lantiq_ar9||TARGET_lantiq_vr9) +kmod-usb-core 
     32  DEPENDS+=@(TARGET_lantiq_danube||TARGET_lantiq_ar9) +kmod-usb-core 
    3333  KCONFIG:=CONFIG_DWC_OTG \ 
    3434        CONFIG_DWC_OTG_DEBUG=n \ 
     
    4545 
    4646$(eval $(call KernelPackage,usb-dwc-otg)) 
     47 
     48define KernelPackage/usb-ifxhcd 
     49  TITLE:=IFXHCD usb driver 
     50  SUBMENU:=$(USB_MENU) 
     51  DEPENDS+=@(TARGET_lantiq_vr9||TARGET_lantiq_ar9) +kmod-usb-core 
     52ifeq ($(CONFIG_TARGET_lantiq_ar9),) 
     53  KCONFIG:=CONFIG_USB_HOST_IFX \ 
     54        CONFIG_USB_HOST_IFX_B=y \ 
     55        CONFIG_IFX_VR9=y \ 
     56        CONFIG_IFX_AR9=n \ 
     57        CONFIG_USB_HOST_IFX_FORCE_USB11=n \ 
     58        CONFIG_USB_HOST_IFX_WITH_HS_ELECT_TST=n \ 
     59        CONFIG_USB_HOST_IFX_WITH_ISO=n \ 
     60        CONFIG_USB_HOST_IFX_UNALIGNED_ADJ=y 
     61else 
     62  KCONFIG:=CONFIG_USB_HOST_IFX \ 
     63        CONFIG_USB_HOST_IFX_B=y \ 
     64        CONFIG_IFX_AR9=y \ 
     65        CONFIG_IFX_VR9=n \ 
     66        CONFIG_USB_HOST_IFX_FORCE_USB11=n \ 
     67        CONFIG_USB_HOST_IFX_WITH_HS_ELECT_TST=n \ 
     68        CONFIG_USB_HOST_IFX_WITH_ISO=n \ 
     69        CONFIG_USB_HOST_IFX_UNALIGNED_ADJ=y 
     70endif 
     71  FILES:=$(LINUX_DIR)/drivers/usb/ifxhcd/ifxusb_host.ko 
     72  AUTOLOAD:=$(call AutoLoad,50,ifxusb_host) 
     73endef 
     74 
     75define KernelPackage/usb-ifxhcd/description 
     76  Kernel support for Synopsis USB on XWAY 
     77endef 
     78 
     79$(eval $(call KernelPackage,usb-ifxhcd)) 
    4780 
    4881I2C_FALCON_MODULES:= \ 
  • trunk/target/linux/lantiq/patches-3.2/0005-MIPS-lantiq-reorganize-xway-code.patch

    r31059 r31060  
    1 From d90739a8962b541969b4c5f7ef1df8fec9c7f153 Mon Sep 17 00:00:00 2001 
     1From cf7086d4c2f7caeccd019c0a57bf1566c72c13ee Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Wed, 10 Aug 2011 14:57:04 +0200 
    4 Subject: [PATCH 04/24] MIPS: lantiq: reorganize xway code 
     4Subject: [PATCH 05/70] MIPS: lantiq: reorganize xway code 
    55 
    66Inside the folder arch/mips/lantiq/xway, there were alot of small files with 
     
    1212 
    1313Signed-off-by: John Crispin <blogic@openwrt.org> 
    14 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    15 Cc: linux-mips@linux-mips.org 
    1614--- 
    1715 arch/mips/include/asm/mach-lantiq/lantiq.h         |   14 +--- 
     
    2018 arch/mips/lantiq/devices.c                         |   30 ++------ 
    2119 arch/mips/lantiq/devices.h                         |    4 + 
    22  arch/mips/lantiq/prom.c                            |   50 +++++++++++-- 
     20 arch/mips/lantiq/prom.c                            |   51 +++++++++++-- 
    2321 arch/mips/lantiq/prom.h                            |    4 + 
    2422 arch/mips/lantiq/xway/Makefile                     |    6 +- 
    2523 arch/mips/lantiq/xway/devices.c                    |   42 ++--------- 
    26  arch/mips/lantiq/xway/dma.c                        |   21 ++---- 
    27  arch/mips/lantiq/xway/ebu.c                        |   53 -------------- 
    28  arch/mips/lantiq/xway/pmu.c                        |   70 ------------------ 
    29  arch/mips/lantiq/xway/prom-ase.c                   |    9 +++ 
     24 arch/mips/lantiq/xway/dma.c                        |   21 +---- 
     25 arch/mips/lantiq/xway/ebu.c                        |   52 ------------- 
     26 arch/mips/lantiq/xway/pmu.c                        |   69 ----------------- 
     27 arch/mips/lantiq/xway/prom-ase.c                   |    9 ++ 
    3028 arch/mips/lantiq/xway/prom-xway.c                  |   10 +++ 
    31  arch/mips/lantiq/xway/reset.c                      |   21 ++---- 
     29 arch/mips/lantiq/xway/reset.c                      |   21 +---- 
    3230 arch/mips/lantiq/xway/setup-ase.c                  |   19 ----- 
    3331 arch/mips/lantiq/xway/setup-xway.c                 |   20 ----- 
    34  arch/mips/lantiq/xway/sysctrl.c                    |   77 ++++++++++++++++++++ 
     32 arch/mips/lantiq/xway/sysctrl.c                    |   78 ++++++++++++++++++++ 
    3533 drivers/watchdog/lantiq_wdt.c                      |    2 +- 
    36  19 files changed, 197 insertions(+), 294 deletions(-) 
     34 19 files changed, 199 insertions(+), 292 deletions(-) 
    3735 delete mode 100644 arch/mips/lantiq/xway/ebu.c 
    3836 delete mode 100644 arch/mips/lantiq/xway/pmu.c 
     
    4139 create mode 100644 arch/mips/lantiq/xway/sysctrl.c 
    4240 
     41diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h 
     42index ce2f029..66d7300 100644 
    4343--- a/arch/mips/include/asm/mach-lantiq/lantiq.h 
    4444+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h 
     
    6767 extern unsigned int ltq_get_soc_type(void); 
    6868  
    69 @@ -51,7 +43,9 @@ extern void ltq_enable_irq(struct irq_da 
     69@@ -51,7 +43,9 @@ extern void ltq_enable_irq(struct irq_data *data); 
    7070  
    7171 /* find out what caused the last cpu reset */ 
     
    7878 #define IOPORT_RESOURCE_START  0x10000000 
    7979 #define IOPORT_RESOURCE_END    0xffffffff 
     80diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
     81index 8a3c6be..9b7ee366 100644 
    8082--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    8183+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    82 @@ -65,6 +65,8 @@ 
     84@@ -61,6 +61,8 @@ 
    8385 #define LTQ_CGU_BASE_ADDR      0x1F103000 
    8486 #define LTQ_CGU_SIZE           0x1000 
     
    8991 #define LTQ_ICU_BASE_ADDR      0x1F880200 
    9092 #define LTQ_ICU_SIZE           0x100 
    91 @@ -101,6 +103,8 @@ 
     93@@ -97,6 +99,8 @@ 
    9294 #define LTQ_WDT_BASE_ADDR      0x1F8803F0 
    9395 #define LTQ_WDT_SIZE           0x10 
     
    98100 #define LTQ_STP_BASE_ADDR      0x1E100BB0 
    99101 #define LTQ_STP_SIZE           0x40 
    100 @@ -125,11 +129,21 @@ 
     102@@ -121,11 +125,21 @@ 
    101103 #define LTQ_MPS_BASE_ADDR      (KSEG1 + 0x1F107000) 
    102104 #define LTQ_MPS_CHIPID         ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344)) 
     
    120122 static inline int ltq_is_ar9(void) 
    121123 { 
     124diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c 
     125index 77ed70f..39eef7f 100644 
    122126--- a/arch/mips/lantiq/clk.c 
    123127+++ b/arch/mips/lantiq/clk.c 
     
    153157-       if (insert_resource(&iomem_resource, &ltq_cgu_resource) < 0) 
    154158-               panic("Failed to insert cgu memory\n"); 
    155 +       ltq_soc_init(); 
    156   
     159- 
    157160-       if (request_mem_region(ltq_cgu_resource.start, 
    158161-                       resource_size(&ltq_cgu_resource), "cgu") < 0) 
    159162-               panic("Failed to request cgu memory\n"); 
    160 - 
     163+       ltq_soc_init(); 
     164  
    161165-       ltq_cgu_membase = ioremap_nocache(ltq_cgu_resource.start, 
    162166-                               resource_size(&ltq_cgu_resource)); 
     
    171175        clk_put(clk); 
    172176 } 
     177diff --git a/arch/mips/lantiq/devices.c b/arch/mips/lantiq/devices.c 
     178index de1cb2b..7193d78 100644 
    173179--- a/arch/mips/lantiq/devices.c 
    174180+++ b/arch/mips/lantiq/devices.c 
     
    188194 static struct platform_device ltq_nor = { 
    189195        .name           = "ltq_nor", 
    190 @@ -47,12 +43,8 @@ void __init ltq_register_nor(struct phys 
     196@@ -47,12 +43,8 @@ void __init ltq_register_nor(struct physmap_flash_data *data) 
    191197 } 
    192198  
     
    230236        IRQ_RES(rx, LTQ_ASC_RIR(1)), 
    231237        IRQ_RES(err, LTQ_ASC_EIR(1)), 
     238diff --git a/arch/mips/lantiq/devices.h b/arch/mips/lantiq/devices.h 
     239index 2947bb1..a03c23f 100644 
    232240--- a/arch/mips/lantiq/devices.h 
    233241+++ b/arch/mips/lantiq/devices.h 
     
    243251 extern void ltq_register_nor(struct physmap_flash_data *data); 
    244252 extern void ltq_register_wdt(void); 
     253diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c 
     254index e34fcfd..e3b1e25 100644 
    245255--- a/arch/mips/lantiq/prom.c 
    246256+++ b/arch/mips/lantiq/prom.c 
     
    256266  
    257267 unsigned int ltq_get_cpu_ver(void) 
    258 @@ -57,16 +61,50 @@ static void __init prom_init_cmdline(voi 
     268@@ -55,16 +59,51 @@ static void __init prom_init_cmdline(void) 
    259269        } 
    260270 } 
     
    266276+       __iomem void *ret = NULL; 
    267277+       struct resource *lookup = lookup_resource(&iomem_resource, res->start); 
    268   
     278+ 
    269279+       if (lookup && strcmp(lookup->name, res->name)) { 
    270 +               panic("conflicting memory range %s\n", res->name); 
     280+               pr_err("conflicting memory range %s\n", res->name); 
    271281+               return NULL; 
    272282+       } 
    273283+       if (!lookup) { 
    274284+               if (insert_resource(&iomem_resource, res) < 0) { 
    275 +                       panic("Failed to insert %s memory\n", res->name); 
     285+                       pr_err("Failed to insert %s memory\n", res->name); 
    276286+                       return NULL; 
    277287+               } 
     
    279289+       if (request_mem_region(res->start, 
    280290+                       resource_size(res), res->name) < 0) { 
    281 +               panic("Failed to request %s memory\n", res->name); 
     291+               pr_err("Failed to request %s memory\n", res->name); 
    282292+               goto err_res; 
    283293+       } 
    284 + 
     294  
    285295+       ret = ioremap_nocache(res->start, resource_size(res)); 
    286296+       if (!ret) 
     
    299309+       return NULL; 
    300310+} 
     311+EXPORT_SYMBOL(ltq_remap_resource); 
    301312+ 
    302313+void __init prom_init(void) 
     
    313324        pr_info("SoC: %s\n", soc_info.sys_type); 
    314325        prom_init_cmdline(); 
     326diff --git a/arch/mips/lantiq/prom.h b/arch/mips/lantiq/prom.h 
     327index b4229d9..51dba1b 100644 
    315328--- a/arch/mips/lantiq/prom.h 
    316329+++ b/arch/mips/lantiq/prom.h 
     
    337350  
    338351 #endif 
     352diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile 
     353index c517f2e..6678402 100644 
    339354--- a/arch/mips/lantiq/xway/Makefile 
    340355+++ b/arch/mips/lantiq/xway/Makefile 
     
    350365 obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o 
    351366 obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o 
     367diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c 
     368index d614aa7..f97e565 100644 
    352369--- a/arch/mips/lantiq/xway/devices.c 
    353370+++ b/arch/mips/lantiq/xway/devices.c 
     
    422439 static struct platform_device ltq_etop = { 
    423440        .name           = "ltq_etop", 
     441diff --git a/arch/mips/lantiq/xway/dma.c b/arch/mips/lantiq/xway/dma.c 
     442index cbb6ae5..60cd11f 100644 
    424443--- a/arch/mips/lantiq/xway/dma.c 
    425444+++ b/arch/mips/lantiq/xway/dma.c 
    426 @@ -23,6 +23,8 @@ 
     445@@ -24,6 +24,8 @@ 
    427446 #include <lantiq_soc.h> 
    428447 #include <xway_dma.h> 
     
    433452 #define LTQ_DMA_CPOLL          0x14 
    434453 #define LTQ_DMA_CS             0x18 
    435 @@ -54,12 +56,8 @@ 
     454@@ -55,12 +57,8 @@ 
    436455 #define ltq_dma_w32_mask(x, y, z)      ltq_w32_mask(x, y, \ 
    437456                                                ltq_dma_membase + (z)) 
     
    448467 static void __iomem *ltq_dma_membase; 
    449468  
    450 @@ -219,17 +217,8 @@ ltq_dma_init(void) 
     469@@ -220,17 +218,8 @@ ltq_dma_init(void) 
    451470 { 
    452471        int i; 
     
    467486                panic("Failed to remap dma memory\n"); 
    468487  
     488diff --git a/arch/mips/lantiq/xway/ebu.c b/arch/mips/lantiq/xway/ebu.c 
     489deleted file mode 100644 
     490index 033b318..0000000 
    469491--- a/arch/mips/lantiq/xway/ebu.c 
    470492+++ /dev/null 
     
    522544- 
    523545-postcore_initcall(lantiq_ebu_init); 
     546diff --git a/arch/mips/lantiq/xway/pmu.c b/arch/mips/lantiq/xway/pmu.c 
     547deleted file mode 100644 
     548index 39f0d26..0000000 
    524549--- a/arch/mips/lantiq/xway/pmu.c 
    525550+++ /dev/null 
     
    594619- 
    595620-core_initcall(ltq_pmu_init); 
     621diff --git a/arch/mips/lantiq/xway/prom-ase.c b/arch/mips/lantiq/xway/prom-ase.c 
     622index ae4959a..3f86a3b 100644 
    596623--- a/arch/mips/lantiq/xway/prom-ase.c 
    597624+++ b/arch/mips/lantiq/xway/prom-ase.c 
     
    604631  
    605632 #define SOC_AMAZON_SE  "Amazon_SE" 
    606 @@ -26,6 +27,7 @@ void __init ltq_soc_detect(struct ltq_so 
     633@@ -26,6 +27,7 @@ void __init ltq_soc_detect(struct ltq_soc_info *i) 
    607634 { 
    608635        i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT; 
     
    612639        case SOC_ID_AMAZON_SE: 
    613640                i->name = SOC_AMAZON_SE; 
    614 @@ -37,3 +39,10 @@ void __init ltq_soc_detect(struct ltq_so 
     641@@ -37,3 +39,10 @@ void __init ltq_soc_detect(struct ltq_soc_info *i) 
    615642                break; 
    616643        } 
     
    623650+       ltq_register_wdt(); 
    624651+} 
     652diff --git a/arch/mips/lantiq/xway/prom-xway.c b/arch/mips/lantiq/xway/prom-xway.c 
     653index 2228133..d823a92 100644 
    625654--- a/arch/mips/lantiq/xway/prom-xway.c 
    626655+++ b/arch/mips/lantiq/xway/prom-xway.c 
     
    633662  
    634663 #define SOC_DANUBE     "Danube" 
    635 @@ -28,6 +29,7 @@ void __init ltq_soc_detect(struct ltq_so 
     664@@ -28,6 +29,7 @@ void __init ltq_soc_detect(struct ltq_soc_info *i) 
    636665 { 
    637666        i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT; 
     
    641670        case SOC_ID_DANUBE1: 
    642671        case SOC_ID_DANUBE2: 
    643 @@ -52,3 +54,11 @@ void __init ltq_soc_detect(struct ltq_so 
     672@@ -52,3 +54,11 @@ void __init ltq_soc_detect(struct ltq_soc_info *i) 
    644673                break; 
    645674        } 
     
    653682+       ltq_register_wdt(); 
    654683+} 
     684diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c 
     685index 3d41f0b..ca2212a 100644 
    655686--- a/arch/mips/lantiq/xway/reset.c 
    656687+++ b/arch/mips/lantiq/xway/reset.c 
     
    698729                panic("Failed to remap rcu memory\n"); 
    699730  
     731diff --git a/arch/mips/lantiq/xway/setup-ase.c b/arch/mips/lantiq/xway/setup-ase.c 
     732deleted file mode 100644 
     733index f6f3267..0000000 
    700734--- a/arch/mips/lantiq/xway/setup-ase.c 
    701735+++ /dev/null 
     
    720754-       ltq_register_wdt(); 
    721755-} 
     756diff --git a/arch/mips/lantiq/xway/setup-xway.c b/arch/mips/lantiq/xway/setup-xway.c 
     757deleted file mode 100644 
     758index c292f64..0000000 
    722759--- a/arch/mips/lantiq/xway/setup-xway.c 
    723760+++ /dev/null 
     
    743780-       ltq_register_wdt(); 
    744781-} 
     782diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c 
     783new file mode 100644 
     784index 0000000..8fd13a1 
    745785--- /dev/null 
    746786+++ b/arch/mips/lantiq/xway/sysctrl.c 
    747 @@ -0,0 +1,77 @@ 
     787@@ -0,0 +1,78 @@ 
    748788+/* 
    749789+ *  This program is free software; you can redistribute it and/or modify it 
     
    755795+ 
    756796+#include <linux/ioport.h> 
     797+#include <linux/export.h> 
    757798+ 
    758799+#include <lantiq_soc.h> 
     
    823864+       ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) & ~EBU_WRDIS, LTQ_EBU_BUSCON0); 
    824865+} 
     866diff --git a/drivers/watchdog/lantiq_wdt.c b/drivers/watchdog/lantiq_wdt.c 
     867index 102aed0..179bf98 100644 
    825868--- a/drivers/watchdog/lantiq_wdt.c 
    826869+++ b/drivers/watchdog/lantiq_wdt.c 
     
    834877 /* Section 3.4 of the datasheet 
    835878  * The password sequence protects the WDT control register from unintended 
     879--  
     8801.7.7.1 
     881 
  • trunk/target/linux/lantiq/patches-3.2/0007-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch

    r31059 r31060  
    1 From d9355bb07878f9aa40856cc437c43cedc87662fc Mon Sep 17 00:00:00 2001 
     1From 03f55cae0f5d9a4c30f935abf8d621ced64ae425 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 11 Aug 2011 12:25:55 +0200 
    4 Subject: [PATCH 05/24] MIPS: lantiq: make irq.c support the FALC-ON 
     4Subject: [PATCH 07/70] MIPS: lantiq: make irq.c support the FALC-ON 
    55 
    66There are minor differences in how irqs work on xway and falcon socs. 
     
    1111* The EIU does not exist 
    1212 
     13Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    1314Signed-off-by: John Crispin <blogic@openwrt.org> 
    14 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    15 Cc: linux-mips@linux-mips.org 
    1615--- 
    1716 arch/mips/lantiq/irq.c |   24 +++++++++++++----------- 
    1817 1 files changed, 13 insertions(+), 11 deletions(-) 
    1918 
     19diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c 
     20index f9737bb..17c057f 100644 
    2021--- a/arch/mips/lantiq/irq.c 
    2122+++ b/arch/mips/lantiq/irq.c 
    22 @@ -195,7 +195,7 @@ static void ltq_hw_irqdispatch(int modul 
     23@@ -195,7 +195,7 @@ static void ltq_hw_irqdispatch(int module) 
    2324        do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module)); 
    2425  
     
    3839+               if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0) 
    3940+                       panic("Failed to insert eiu memory\n"); 
    40 + 
     41  
     42-       if (request_mem_region(ltq_eiu_resource.start, 
     43-                       resource_size(&ltq_eiu_resource), "eiu") < 0) 
     44-               panic("Failed to request eiu memory\n"); 
    4145+               if (request_mem_region(ltq_eiu_resource.start, 
    4246+                               resource_size(&ltq_eiu_resource), "eiu") < 0) 
    4347+                       panic("Failed to request eiu memory\n"); 
    4448  
    45 -       if (request_mem_region(ltq_eiu_resource.start, 
    46 -                       resource_size(&ltq_eiu_resource), "eiu") < 0) 
    47 -               panic("Failed to request eiu memory\n"); 
    48 - 
    4949-       ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start, 
    5050+               ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start, 
     
    6969                                handle_level_irq); 
    7070                /* EIU3-5 only exist on ar9 and vr9 */ 
     71--  
     721.7.7.1 
     73 
  • trunk/target/linux/lantiq/patches-3.2/0008-MIPS-lantiq-add-basic-support-for-FALC-ON.patch

    r31059 r31060  
    1 From ff57bc17a9964d24708759c6d78a51e337563d5f Mon Sep 17 00:00:00 2001 
     1From d54a53bc8bc25bf2f9076013f89b30cb9103f99f Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 11 Aug 2011 14:33:04 +0200 
    4 Subject: [PATCH 06/24] MIPS: lantiq: add basic support for FALC-ON 
     4Subject: [PATCH 08/70] MIPS: lantiq: add basic support for FALC-ON 
    55 
    6 Adds support for the FALC-ON SoC. This SoC is from the fiber to the home GPON 
    7 series. 
     6Adds support for the FALC-ON SoC. This SoC is from the FTTH/GPON SoC family. 
    87 
     8Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    99Signed-off-by: John Crispin <blogic@openwrt.org> 
    10 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    11 Cc: linux-mips@linux-mips.org 
    1210--- 
    1311 .../include/asm/mach-lantiq/falcon/falcon_irq.h    |  268 ++++++++++++++++++++ 
    1412 arch/mips/include/asm/mach-lantiq/falcon/irq.h     |   18 ++ 
    15  .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |  140 ++++++++++ 
     13 .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |  143 +++++++++++ 
    1614 arch/mips/include/asm/mach-lantiq/lantiq.h         |    1 + 
    1715 arch/mips/lantiq/Kconfig                           |    4 + 
     
    2220 arch/mips/lantiq/falcon/devices.c                  |   87 +++++++ 
    2321 arch/mips/lantiq/falcon/devices.h                  |   18 ++ 
    24  arch/mips/lantiq/falcon/prom.c                     |   72 ++++++ 
     22 arch/mips/lantiq/falcon/prom.c                     |   93 +++++++ 
    2523 arch/mips/lantiq/falcon/reset.c                    |   87 +++++++ 
    26  arch/mips/lantiq/falcon/sysctrl.c                  |  181 +++++++++++++ 
    27  14 files changed, 923 insertions(+), 0 deletions(-) 
     24 arch/mips/lantiq/falcon/sysctrl.c                  |  183 +++++++++++++ 
     25 14 files changed, 949 insertions(+), 0 deletions(-) 
    2826 create mode 100644 arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h 
    2927 create mode 100644 arch/mips/include/asm/mach-lantiq/falcon/irq.h 
     
    3735 create mode 100644 arch/mips/lantiq/falcon/sysctrl.c 
    3836 
     37diff --git a/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h b/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h 
     38new file mode 100644 
     39index 0000000..4dc6466 
    3940--- /dev/null 
    4041+++ b/arch/mips/include/asm/mach-lantiq/falcon/falcon_irq.h 
     
    308309+ 
    309310+#endif /* _FALCON_IRQ__ */ 
     311diff --git a/arch/mips/include/asm/mach-lantiq/falcon/irq.h b/arch/mips/include/asm/mach-lantiq/falcon/irq.h 
     312new file mode 100644 
     313index 0000000..2caccd9 
    310314--- /dev/null 
    311315+++ b/arch/mips/include/asm/mach-lantiq/falcon/irq.h 
     
    329333+ 
    330334+#endif 
     335diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
     336new file mode 100644 
     337index 0000000..b074748 
    331338--- /dev/null 
    332339+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
    333 @@ -0,0 +1,140 @@ 
     340@@ -0,0 +1,143 @@ 
    334341+/* 
    335342+ * This program is free software; you can redistribute it and/or modify it 
     
    362369+#define LTQ_ASC_EIR(x)          (INT_NUM_IM3_IRL0 + (x * 8) + 2) 
    363370+ 
    364 +/* during early_printk no ioremap possible at this early stage 
    365 +   lets use KSEG1 instead  */ 
     371+/* 
     372+ * during early_printk no ioremap possible at this early stage 
     373+ * lets use KSEG1 instead 
     374+ */ 
    366375+#define LTQ_EARLY_ASC          KSEG1ADDR(LTQ_ASC0_BASE_ADDR) 
    367376+ 
     
    408417+ 
    409418+#define LTQ_FALCON_CHIPID      ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x0c)) 
     419+#define LTQ_FALCON_CHIPTYPE    ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x38)) 
    410420+#define LTQ_FALCON_CHIPCONF    ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x40)) 
    411421+ 
     
    458468+ 
    459469+/* gpio_request wrapper to help configure the pin */ 
    460 +extern int ltq_gpio_request(unsigned int pin, unsigned int val, 
     470+extern int  ltq_gpio_request(unsigned int pin, unsigned int mux, 
    461471+                               unsigned int dir, const char *name); 
    462472+extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux); 
     
    472482+#endif /* CONFIG_SOC_FALCON */ 
    473483+#endif /* _LTQ_XWAY_H__ */ 
     484diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h 
     485index 66d7300..188de0f 100644 
    474486--- a/arch/mips/include/asm/mach-lantiq/lantiq.h 
    475487+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h 
    476 @@ -25,6 +25,7 @@ extern unsigned int ltq_get_soc_type(voi 
     488@@ -25,6 +25,7 @@ extern unsigned int ltq_get_soc_type(void); 
    477489 /* clock speeds */ 
    478490 #define CLOCK_60M      60000000 
     
    482494 #define CLOCK_133M     133333333 
    483495 #define CLOCK_167M     166666667 
     496diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig 
     497index 3fccf21..cb6b39f 100644 
    484498--- a/arch/mips/lantiq/Kconfig 
    485499+++ b/arch/mips/lantiq/Kconfig 
     
    497511  
    498512 endif 
     513diff --git a/arch/mips/lantiq/Makefile b/arch/mips/lantiq/Makefile 
     514index e5dae0e..7e9c69e 100644 
    499515--- a/arch/mips/lantiq/Makefile 
    500516+++ b/arch/mips/lantiq/Makefile 
    501 @@ -9,3 +9,4 @@ obj-y := irq.o setup.o clk.o prom.o devi 
     517@@ -9,3 +9,4 @@ obj-y := irq.o setup.o clk.o prom.o devices.o 
    502518 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 
    503519  
    504520 obj-$(CONFIG_SOC_TYPE_XWAY) += xway/ 
    505521+obj-$(CONFIG_SOC_FALCON) += falcon/ 
     522diff --git a/arch/mips/lantiq/Platform b/arch/mips/lantiq/Platform 
     523index f3dff05..b3ec498 100644 
    506524--- a/arch/mips/lantiq/Platform 
    507525+++ b/arch/mips/lantiq/Platform 
     
    511529 cflags-$(CONFIG_SOC_TYPE_XWAY) += -I$(srctree)/arch/mips/include/asm/mach-lantiq/xway 
    512530+cflags-$(CONFIG_SOC_FALCON)    += -I$(srctree)/arch/mips/include/asm/mach-lantiq/falcon 
     531diff --git a/arch/mips/lantiq/falcon/Makefile b/arch/mips/lantiq/falcon/Makefile 
     532new file mode 100644 
     533index 0000000..e9c7455 
    513534--- /dev/null 
    514535+++ b/arch/mips/lantiq/falcon/Makefile 
    515536@@ -0,0 +1 @@ 
    516537+obj-y := clk.o prom.o reset.o sysctrl.o devices.o 
     538diff --git a/arch/mips/lantiq/falcon/clk.c b/arch/mips/lantiq/falcon/clk.c 
     539new file mode 100644 
     540index 0000000..afe1b52 
    517541--- /dev/null 
    518542+++ b/arch/mips/lantiq/falcon/clk.c 
     
    528552+ 
    529553+#include <linux/ioport.h> 
    530 +#include <linux/module.h> 
     554+#include <linux/export.h> 
    531555+ 
    532556+#include <lantiq_soc.h> 
     
    562586+} 
    563587+EXPORT_SYMBOL(ltq_get_fpi_hz); 
     588diff --git a/arch/mips/lantiq/falcon/devices.c b/arch/mips/lantiq/falcon/devices.c 
     589new file mode 100644 
     590index 0000000..c4606f2 
    564591--- /dev/null 
    565592+++ b/arch/mips/lantiq/falcon/devices.c 
     
    652679+       platform_device_register(&ltq_flash_nand); 
    653680+} 
     681diff --git a/arch/mips/lantiq/falcon/devices.h b/arch/mips/lantiq/falcon/devices.h 
     682new file mode 100644 
     683index 0000000..e802a7c 
    654684--- /dev/null 
    655685+++ b/arch/mips/lantiq/falcon/devices.h 
     
    673703+ 
    674704+#endif 
     705diff --git a/arch/mips/lantiq/falcon/prom.c b/arch/mips/lantiq/falcon/prom.c 
     706new file mode 100644 
     707index 0000000..b50d6f9 
    675708--- /dev/null 
    676709+++ b/arch/mips/lantiq/falcon/prom.c 
    677 @@ -0,0 +1,72 @@ 
     710@@ -0,0 +1,93 @@ 
    678711+/* 
    679712+ * This program is free software; you can redistribute it and/or modify it 
     
    692725+ 
    693726+#define SOC_FALCON             "Falcon" 
     727+#define SOC_FALCON_D           "Falcon-D" 
     728+#define SOC_FALCON_V           "Falcon-V" 
     729+#define SOC_FALCON_M           "Falcon-M" 
    694730+ 
    695731+#define PART_SHIFT     12 
     
    699735+#define SREV_SHIFT     22 
    700736+#define SREV_MASK      0x03C00000 
     737+#define TYPE_SHIFT     26 
     738+#define TYPE_MASK      0x3C000000 
    701739+ 
    702740+#define MUXC_SIF_RX_PIN                112 
     
    732770+ltq_soc_detect(struct ltq_soc_info *i) 
    733771+{ 
     772+       u32 type; 
    734773+       i->partnum = (ltq_r32(LTQ_FALCON_CHIPID) & PART_MASK) >> PART_SHIFT; 
    735774+       i->rev = (ltq_r32(LTQ_FALCON_CHIPID) & REV_MASK) >> REV_SHIFT; 
    736 +       i->srev = (ltq_r32(LTQ_FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT; 
     775+       i->srev = ((ltq_r32(LTQ_FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT); 
    737776+       sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'), 
    738 +               i->rev & 0x7, i->srev & 0x3); 
     777+               i->rev & 0x7, (i->srev & 0x3) + 1); 
     778+ 
    739779+       switch (i->partnum) { 
    740780+       case SOC_ID_FALCON: 
    741 +               i->name = SOC_FALCON; 
     781+               type = (ltq_r32(LTQ_FALCON_CHIPTYPE) & TYPE_MASK) >> TYPE_SHIFT; 
     782+               switch (type) { 
     783+               case 0: 
     784+                       i->name = SOC_FALCON_D; 
     785+                       break; 
     786+               case 1: 
     787+                       i->name = SOC_FALCON_V; 
     788+                       break; 
     789+               case 2: 
     790+                       i->name = SOC_FALCON_M; 
     791+                       break; 
     792+               default: 
     793+                       i->name = SOC_FALCON; 
     794+                       break; 
     795+               } 
    742796+               i->type = SOC_TYPE_FALCON; 
    743797+               break; 
     
    748802+       } 
    749803+} 
     804diff --git a/arch/mips/lantiq/falcon/reset.c b/arch/mips/lantiq/falcon/reset.c 
     805new file mode 100644 
     806index 0000000..cbcadc5 
    750807--- /dev/null 
    751808+++ b/arch/mips/lantiq/falcon/reset.c 
     
    764821+#include <linux/pm.h> 
    765822+#include <asm/reboot.h> 
    766 +#include <linux/module.h> 
     823+#include <linux/export.h> 
    767824+ 
    768825+#include <lantiq_soc.h> 
     
    838895+ 
    839896+arch_initcall(mips_reboot_setup); 
     897diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c 
     898new file mode 100644 
     899index 0000000..905a142 
    840900--- /dev/null 
    841901+++ b/arch/mips/lantiq/falcon/sysctrl.c 
    842 @@ -0,0 +1,181 @@ 
     902@@ -0,0 +1,183 @@ 
    843903+/* 
    844904+ * This program is free software; you can redistribute it and/or modify it 
     
    851911+ 
    852912+#include <linux/ioport.h> 
     913+#include <linux/export.h> 
    853914+#include <asm/delay.h> 
    854915+ 
     
    906967+ 
    907968+static inline void 
    908 +ltq_sysctl_wait(int module, unsigned int mask, unsigned int test) 
     969+ltq_sysctl_wait(int module, unsigned int mask, 
     970+               unsigned int test, unsigned int reg) 
    909971+{ 
    910972+       int err = 1000000; 
    911973+ 
    912 +       do {} while (--err && ((ltq_reg_r32(module, LTQ_SYSCTL_ACTS) 
     974+       do {} while (--err && ((ltq_reg_r32(module, reg) 
    913975+                                       & mask) != test)); 
    914976+       if (!err) 
     
    925987+       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN); 
    926988+       ltq_reg_w32(module, mask, LTQ_SYSCTL_ACT); 
    927 +       ltq_sysctl_wait(module, mask, mask); 
     989+       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS); 
    928990+} 
    929991+EXPORT_SYMBOL(ltq_sysctl_activate); 
     
    937999+       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR); 
    9381000+       ltq_reg_w32(module, mask, LTQ_SYSCTL_DEACT); 
    939 +       ltq_sysctl_wait(module, mask, 0); 
     1001+       ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_ACTS); 
    9401002+} 
    9411003+EXPORT_SYMBOL(ltq_sysctl_deactivate); 
     
    9481010+ 
    9491011+       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN); 
    950 +       ltq_sysctl_wait(module, mask, mask); 
     1012+       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_CLKS); 
    9511013+} 
    9521014+EXPORT_SYMBOL(ltq_sysctl_clken); 
     
    9591021+ 
    9601022+       ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR); 
    961 +       ltq_sysctl_wait(module, mask, 0); 
     1023+       ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_CLKS); 
    9621024+} 
    9631025+EXPORT_SYMBOL(ltq_sysctl_clkdis); 
     
    9751037+               ltq_sysctl_activate(module, ~act & mask); 
    9761038+       ltq_reg_w32(module, act & mask, LTQ_SYSCTL_RBT); 
    977 +       ltq_sysctl_wait(module, mask, mask); 
     1039+       ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS); 
    9781040+} 
    9791041+EXPORT_SYMBOL(ltq_sysctl_reboot); 
     
    10221084+       ltq_gpe_enable(); 
    10231085+} 
     1086--  
     10871.7.7.1 
     1088 
  • trunk/target/linux/lantiq/patches-3.2/0009-MIPS-lantiq-add-support-for-FALC-ON-GPIOs.patch

    r31059 r31060  
    1 From 02d9df56be1ba23c7bec51c94e5d2ac0d13d2d78 Mon Sep 17 00:00:00 2001 
     1From 95e7c9e7b37b06462c8b3b8431dc64d60369eb38 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 11 Aug 2011 14:35:02 +0200 
    4 Subject: [PATCH 07/24] MIPS: lantiq: add support for FALC-ON GPIOs 
     4Subject: [PATCH 09/70] MIPS: lantiq: add support for FALC-ON GPIOs 
    55 
    66FALC-ON uses a different GPIO core than the other Lantiq SoCs. This patch adds 
     
    99Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    1010Signed-off-by: John Crispin <blogic@openwrt.org> 
    11 Cc: linux-mips@linux-mips.org 
    1211--- 
    1312 arch/mips/lantiq/falcon/Makefile  |    2 +- 
    1413 arch/mips/lantiq/falcon/devices.c |   41 ++++ 
    1514 arch/mips/lantiq/falcon/devices.h |    2 + 
    16  arch/mips/lantiq/falcon/gpio.c    |  398 +++++++++++++++++++++++++++++++++++++ 
    17  4 files changed, 442 insertions(+), 1 deletions(-) 
     15 arch/mips/lantiq/falcon/gpio.c    |  399 +++++++++++++++++++++++++++++++++++++ 
     16 4 files changed, 443 insertions(+), 1 deletions(-) 
    1817 create mode 100644 arch/mips/lantiq/falcon/gpio.c 
    1918 
     19diff --git a/arch/mips/lantiq/falcon/Makefile b/arch/mips/lantiq/falcon/Makefile 
     20index e9c7455..de72209 100644 
    2021--- a/arch/mips/lantiq/falcon/Makefile 
    2122+++ b/arch/mips/lantiq/falcon/Makefile 
     
    2324-obj-y := clk.o prom.o reset.o sysctrl.o devices.o 
    2425+obj-y := clk.o prom.o reset.o sysctrl.o devices.o gpio.o 
     26diff --git a/arch/mips/lantiq/falcon/devices.c b/arch/mips/lantiq/falcon/devices.c 
     27index c4606f2..4f47b44 100644 
    2528--- a/arch/mips/lantiq/falcon/devices.c 
    2629+++ b/arch/mips/lantiq/falcon/devices.c 
     
    7780+               ACTS_PADCTRL3 | ACTS_PADCTRL4 | ACTS_P3 | ACTS_P4); 
    7881+} 
     82diff --git a/arch/mips/lantiq/falcon/devices.h b/arch/mips/lantiq/falcon/devices.h 
     83index e802a7c..18be8b6 100644 
    7984--- a/arch/mips/lantiq/falcon/devices.h 
    8085+++ b/arch/mips/lantiq/falcon/devices.h 
     
    8792  
    8893 #endif 
     94diff --git a/arch/mips/lantiq/falcon/gpio.c b/arch/mips/lantiq/falcon/gpio.c 
     95new file mode 100644 
     96index 0000000..28f8639 
    8997--- /dev/null 
    9098+++ b/arch/mips/lantiq/falcon/gpio.c 
    91 @@ -0,0 +1,398 @@ 
     99@@ -0,0 +1,399 @@ 
    92100+/* 
    93101+ *  This program is free software; you can redistribute it and/or modify it 
     
    102110+#include <linux/interrupt.h> 
    103111+#include <linux/slab.h> 
     112+#include <linux/export.h> 
    104113+#include <linux/platform_device.h> 
    105114+ 
     
    188197+EXPORT_SYMBOL(ltq_gpio_mux_set); 
    189198+ 
    190 +int ltq_gpio_request(unsigned int pin, unsigned int val, 
    191 +               unsigned int dir, const char *name) 
     199+int ltq_gpio_request(unsigned int pin, unsigned int mux, 
     200+                       unsigned int dir, const char *name) 
    192201+{ 
    193202+       int port = pin / 100; 
     
    207216+               gpio_direction_input(pin); 
    208217+ 
    209 +       return ltq_gpio_mux_set(pin, val); 
     218+       return ltq_gpio_mux_set(pin, mux); 
    210219+} 
    211220+EXPORT_SYMBOL(ltq_gpio_request); 
     
    488497+ 
    489498+postcore_initcall(falcon_gpio_init); 
     499--  
     5001.7.7.1 
     501 
  • trunk/target/linux/lantiq/patches-3.2/0010-MIPS-lantiq-add-support-for-the-EASY98000-evaluation.patch

    r31059 r31060  
    1 From ec6ba0f79c010a878d679c057fb6306b50a201b0 Mon Sep 17 00:00:00 2001 
     1From 9397aa9584bade07ae667ecd5135653f9c04e236 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 11 Aug 2011 14:09:35 +0200 
    4 Subject: [PATCH 08/24] MIPS: lantiq: add support for the EASY98000 evaluation 
     4Subject: [PATCH 10/70] MIPS: lantiq: add support for the EASY98000 evaluation 
    55 board 
    66 
     
    99Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    1010Signed-off-by: John Crispin <blogic@openwrt.org> 
    11 Cc: linux-mips@linux-mips.org 
    1211--- 
    1312 arch/mips/lantiq/falcon/Kconfig          |   11 +++ 
     
    1918 create mode 100644 arch/mips/lantiq/falcon/mach-easy98000.c 
    2019 
     20diff --git a/arch/mips/lantiq/falcon/Kconfig b/arch/mips/lantiq/falcon/Kconfig 
     21new file mode 100644 
     22index 0000000..03e999d 
    2123--- /dev/null 
    2224+++ b/arch/mips/lantiq/falcon/Kconfig 
     
    3335+ 
    3436+endif 
     37diff --git a/arch/mips/lantiq/falcon/Makefile b/arch/mips/lantiq/falcon/Makefile 
     38index de72209..56b22eb 100644 
    3539--- a/arch/mips/lantiq/falcon/Makefile 
    3640+++ b/arch/mips/lantiq/falcon/Makefile 
     
    3842 obj-y := clk.o prom.o reset.o sysctrl.o devices.o gpio.o 
    3943+obj-$(CONFIG_LANTIQ_MACH_EASY98000) += mach-easy98000.o 
     44diff --git a/arch/mips/lantiq/falcon/mach-easy98000.c b/arch/mips/lantiq/falcon/mach-easy98000.c 
     45new file mode 100644 
     46index 0000000..361b8f0 
    4047--- /dev/null 
    4148+++ b/arch/mips/lantiq/falcon/mach-easy98000.c 
     
    151158+                       "EASY98000 Eval Board (NAND Flash)", 
    152159+                       easy98000nand_init); 
     160diff --git a/arch/mips/lantiq/machtypes.h b/arch/mips/lantiq/machtypes.h 
     161index 7e01b8c..dfc6af7 100644 
    153162--- a/arch/mips/lantiq/machtypes.h 
    154163+++ b/arch/mips/lantiq/machtypes.h 
     
    165174  
    166175 #endif 
     176--  
     1771.7.7.1 
     178 
  • trunk/target/linux/lantiq/patches-3.2/0011-MIPS-lantiq-fix-early-printk.patch

    r31059 r31060  
    1 From 91f8d0c8fbb9ea70bf78a291e312157177be8ee3 Mon Sep 17 00:00:00 2001 
     1From 68e9e86dda22c491e5e3c44271a91aefcf636434 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Sat, 20 Aug 2011 18:55:13 +0200 
    4 Subject: [PATCH 01/24] MIPS: lantiq: fix early printk 
     4Subject: [PATCH 11/70] MIPS: lantiq: fix early printk 
    55 
    6 The code was using a 32bit write operation in the early_printk code. This 
    7 resulted in 3 zero bytes also being written to the serial port. Change the 
    8 memory access to 8bit. 
     6The code was using a 32bit write operations in the early_printk code. This 
     7resulted in 3 zero bytes also being written to the serial port. This patch 
     8changes the memory access to 8bit. 
    99 
    1010Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    1111Signed-off-by: John Crispin <blogic@openwrt.org> 
    12 Cc: linux-mips@linux-mips.org 
    1312--- 
    14  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    4 ++++ 
     13 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    6 ++++++ 
    1514 arch/mips/lantiq/early_printk.c                    |   14 ++++++++------ 
    16  2 files changed, 12 insertions(+), 6 deletions(-) 
     15 2 files changed, 14 insertions(+), 6 deletions(-) 
    1716 
     17diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
     18index 87f6d24..e31f52d 100644 
    1819--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    1920+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    20 @@ -34,6 +34,10 @@ 
     21@@ -34,6 +34,12 @@ 
    2122 #define LTQ_ASC1_BASE_ADDR     0x1E100C00 
    2223 #define LTQ_ASC_SIZE           0x400 
    2324  
    24 +/* during early_printk no ioremap is possible 
    25 +   lets use KSEG1 instead  */ 
     25+/* 
     26+ * during early_printk no ioremap is possible 
     27+ * lets use KSEG1 instead 
     28+ */ 
    2629+#define LTQ_EARLY_ASC          KSEG1ADDR(LTQ_ASC1_BASE_ADDR) 
    2730+ 
     
    2932 #define LTQ_RCU_BASE_ADDR      0x1F203000 
    3033 #define LTQ_RCU_SIZE           0x1000 
     34diff --git a/arch/mips/lantiq/early_printk.c b/arch/mips/lantiq/early_printk.c 
     35index 972e05f..5089075 100644 
    3136--- a/arch/mips/lantiq/early_printk.c 
    3237+++ b/arch/mips/lantiq/early_printk.c 
     
    5964        local_irq_restore(flags); 
    6065 } 
     66--  
     671.7.7.1 
     68 
  • trunk/target/linux/lantiq/patches-3.2/0012-MIPS-lantiq-fix-cmdline-parsing.patch

    r31059 r31060  
    1 From b85d5204f2fe8c3b5e6172f7cc1741ad6e849334 Mon Sep 17 00:00:00 2001 
     1From 3be934b64f874e6cd2af7945f4fc441c7fadb34f Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Fri, 12 Aug 2011 16:27:38 +0200 
    4 Subject: [PATCH 02/24] MIPS: lantiq: fix cmdline parsing 
     4Subject: [PATCH 12/70] MIPS: lantiq: fix cmdline parsing 
    55 
    66The code tested if the KSEG1 mapped address of argv was != 0. We need to use 
     
    99Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    1010Signed-off-by: John Crispin <blogic@openwrt.org> 
    11 Cc: linux-mips@linux-mips.org 
    1211--- 
    1312 arch/mips/lantiq/prom.c |    6 ++++-- 
    1413 1 files changed, 4 insertions(+), 2 deletions(-) 
    1514 
     15diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c 
     16index e3b1e25..acb8921 100644 
    1617--- a/arch/mips/lantiq/prom.c 
    1718+++ b/arch/mips/lantiq/prom.c 
    18 @@ -45,10 +45,12 @@ static void __init prom_init_cmdline(voi 
     19@@ -49,10 +49,12 @@ static void __init prom_init_cmdline(void) 
    1920        char **argv = (char **) KSEG1ADDR(fw_arg1); 
    2021        int i; 
     
    3132                        strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); 
    3233                } 
     34--  
     351.7.7.1 
     36 
  • trunk/target/linux/lantiq/patches-3.2/0013-MIPS-lantiq-fix-STP-gpio-groups.patch

    r31059 r31060  
    1 From 2dfa2b3e50c5ac49052233d15fa427a9b9136df8 Mon Sep 17 00:00:00 2001 
     1From 556ba7f7149a0350a47ecf26185aed99c8d87176 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 27 Oct 2011 20:06:05 +0200 
    4 Subject: [PATCH 10/22] MIPS: lantiq: fixes STP based gpios 
     4Subject: [PATCH 13/70] MIPS: lantiq: fix STP gpio groups 
    55 
    66The STP engine has 3 groups of 8 pins. Only the first was activated by default. 
     7This patch activates the 2 missing groups. 
    78 
    89Signed-off-by: Matti Laakso <malaakso@elisanet.fi> 
     
    1213 1 files changed, 5 insertions(+), 2 deletions(-) 
    1314 
     15diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c 
     16index 2c78660..cb6f170 100644 
    1417--- a/arch/mips/lantiq/xway/gpio_stp.c 
    1518+++ b/arch/mips/lantiq/xway/gpio_stp.c 
     
    3538        /* stp are update periodically by the FPI bus */ 
    3639        ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1); 
     40--  
     411.7.7.1 
     42 
  • trunk/target/linux/lantiq/patches-3.2/0014-MIPS-lantiq-fix-pull-gpio-up-resistors-usage.patch

    r31059 r31060  
    1 From 6efd9a5f303c4561eee14ae429b8c0fafa6c5a83 Mon Sep 17 00:00:00 2001 
     1From e97f45d255f4a223d38e2f39c1ddf7a3e0766527 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 27 Oct 2011 20:06:30 +0200 
    4 Subject: [PATCH 11/22] MIPS: lantiq: activate pull up resistors when gpio is 
    5  a input 
     4Subject: [PATCH 14/70] MIPS: lantiq: fix pull gpio up resistors usage 
    65 
    7 The register that enables a gpios internal pullups was not set. 
     6The register that enables a gpios internal pullups was not used. This patch 
     7makes sure the pullups are activated correctly. 
    88 
    99Signed-off-by: Matti Laakso <malaakso@elisanet.fi> 
     
    1313 1 files changed, 6 insertions(+), 0 deletions(-) 
    1414 
     15diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c 
     16index f204f6c..14ff7c7 100644 
    1517--- a/arch/mips/lantiq/xway/gpio.c 
    1618+++ b/arch/mips/lantiq/xway/gpio.c 
     
    2426 #define PINS_PER_PORT          16 
    2527 #define MAX_PORTS              3 
    26 @@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(stru 
     28@@ -106,6 +108,8 @@ static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) 
    2729  
    2830        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); 
     
    3335        return 0; 
    3436 } 
    35 @@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(str 
     37@@ -117,6 +121,8 @@ static int ltq_gpio_direction_output(struct gpio_chip *chip, 
    3638  
    3739        ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); 
     
    4244  
    4345        return 0; 
     46--  
     471.7.7.1 
     48 
  • trunk/target/linux/lantiq/patches-3.2/0017-MIPS-make-oprofile-use-cp0_perfcount_irq-if-it-is-se.patch

    r31059 r31060  
    1 --- a/arch/mips/Makefile 
    2 +++ b/arch/mips/Makefile 
    3 @@ -49,7 +49,9 @@ ifneq ($(SUBARCH),$(ARCH)) 
    4  endif 
    5   
    6  ifndef CONFIG_FUNCTION_TRACER 
    7 -cflags-y := -ffunction-sections 
    8 +  ifndef CONFIG_PROFILING 
    9 +    cflags-y := -ffunction-sections 
    10 +  endif 
    11  endif 
    12  ifdef CONFIG_FUNCTION_GRAPH_TRACER 
    13    ifndef KBUILD_MCOUNT_RA_ADDRESS 
     1From bc3a07e6c5149a82a22239a43e9f98514c2010d9 Mon Sep 17 00:00:00 2001 
     2From: John Crispin <blogic@openwrt.org> 
     3Date: Wed, 24 Aug 2011 13:24:11 +0200 
     4Subject: [PATCH 17/70] MIPS: make oprofile use cp0_perfcount_irq if it is set 
     5 
     6The patch makes the oprofile code use the performance counters irq. 
     7 
     8This patch is written by Felix Fietkau. 
     9 
     10Signed-off-by: Felix Fietkau <nbd@openwrt.org> 
     11Signed-off-by: John Crispin <blogic@openwrt.org> 
     12--- 
     13 arch/mips/oprofile/op_model_mipsxx.c |   12 ++++++++++++ 
     14 1 files changed, 12 insertions(+), 0 deletions(-) 
     15 
     16diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c 
     17index 54759f1..86cf234 100644 
    1418--- a/arch/mips/oprofile/op_model_mipsxx.c 
    1519+++ b/arch/mips/oprofile/op_model_mipsxx.c 
     
    4751        on_each_cpu(reset_counters, (void *)(long)counters, 1); 
    4852  
     53--  
     541.7.7.1 
     55 
  • trunk/target/linux/lantiq/patches-3.2/0018-MIPS-lantiq-enable-oprofile-support-on-lantiq-target.patch

    r31059 r31060  
    1 From cc4b9cdff8665a414ae51101d3a0ca6ed7444a27 Mon Sep 17 00:00:00 2001 
     1From e0bd3f1b16fbce1f0f7900a0dd624f9dc8a47f78 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Wed, 24 Aug 2011 13:28:55 +0200 
    4 Subject: [PATCH 10/24] MIPS: enable oprofile support on lantiq targets 
     4Subject: [PATCH 18/70] MIPS: lantiq: enable oprofile support on lantiq 
     5 targets 
    56 
    6 This patch sets the performance counters irq and HAVE_OPROFILE flag. 
     7This patch sets the performance counters irq and HAVE_OPROFILE flag for Lantiq 
     8SoCs. 
    79 
    810Signed-off-by: John Crispin <blogic@openwrt.org> 
    9 Cc: linux-mips@linux-mips.org 
    1011--- 
    1112 arch/mips/Kconfig      |    1 + 
     
    1314 2 files changed, 6 insertions(+), 0 deletions(-) 
    1415 
     16diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig 
     17index d46f1da..c1ceadb 100644 
    1518--- a/arch/mips/Kconfig 
    1619+++ b/arch/mips/Kconfig 
    17 @@ -230,6 +230,7 @@ config LANTIQ 
     20@@ -226,6 +226,7 @@ config LANTIQ 
    1821        select SWAP_IO_SPACE 
    1922        select BOOT_RAW 
     
    2326  
    2427 config LASAT 
     28diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c 
     29index 17c057f..0b2ed87 100644 
    2530--- a/arch/mips/lantiq/irq.c 
    2631+++ b/arch/mips/lantiq/irq.c 
     
    4449  
    4550 unsigned int __cpuinit get_c0_compare_int(void) 
     51--  
     521.7.7.1 
     53 
  • trunk/target/linux/lantiq/patches-3.2/0019-NET-MIPS-lantiq-make-etop-ethernet-work-on-ase-ar9.patch

    r31059 r31060  
    1 From c7881d8d2b3aed9a90aa37dcf797328a9cfbe7b6 Mon Sep 17 00:00:00 2001 
     1From 4b24c79196e5777baff0f5d53b62cf2a964e26ff Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Wed, 10 Aug 2011 15:32:16 +0200 
    4 Subject: [PATCH 15/24] MIPS: lantiq: adds etop support for ase/ar9 
     4Subject: [PATCH 19/70] NET: MIPS: lantiq: make etop ethernet work on ase/ar9 
    55 
    66Extend the driver to handle the different DMA channel layout for AR9 and 
    7 SoCs. The patch also adds support for the integrated PHY found on Amazon-SE 
    8 and the gigabit switch found inside the AR9. 
     7Amazon-SE SoCs. The patch also adds support for the integrated PHY found 
     8on Amazon-SE and the gigabit switch found inside the AR9. 
    99 
    1010Signed-off-by: John Crispin <blogic@openwrt.org> 
    11 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
     11Cc: netdev@vger.kernel.org 
    1212--- 
    1313 .../mips/include/asm/mach-lantiq/xway/lantiq_irq.h |   22 +--- 
    1414 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |   10 ++ 
    1515 arch/mips/lantiq/xway/devices.c                    |   11 +- 
    16  arch/mips/lantiq/xway/mach-easy50601.c             |    5 + 
    17  drivers/net/lantiq_etop.c                          |  172 ++++++++++++++++++-- 
    18  5 files changed, 180 insertions(+), 40 deletions(-) 
     16 drivers/net/ethernet/lantiq_etop.c                 |  171 ++++++++++++++++++-- 
     17 4 files changed, 174 insertions(+), 40 deletions(-) 
    1918 
     19diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h 
     20index b4465a8..2a8d5ad 100644 
    2021--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h 
    2122+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h 
    22 @@ -40,26 +40,8 @@ 
     23@@ -38,26 +38,8 @@ 
    2324  
    2425 #define MIPS_CPU_TIMER_IRQ             7 
     
    4950 #define LTQ_PPE_MBOX_INT       (INT_NUM_IM2_IRL0 + 24) 
    5051  
     52diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
     53index e31f52d..6983d75 100644 
    5154--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    5255+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    53 @@ -80,6 +80,7 @@ 
     56@@ -82,6 +82,7 @@ 
    5457 #define LTQ_PMU_SIZE           0x1000 
    5558  
     
    5760+#define PMU_EPHY               0x0080 
    5861 #define PMU_USB                        0x8041 
    59  #define PMU_SPI                        0x0100 
    6062 #define PMU_LED                        0x0800 
    61 @@ -92,6 +93,10 @@ 
     63 #define PMU_GPT                        0x1000 
     64@@ -93,6 +94,10 @@ 
    6265 #define LTQ_ETOP_BASE_ADDR     0x1E180000 
    6366 #define LTQ_ETOP_SIZE          0x40000 
     
    7073 #define LTQ_DMA_BASE_ADDR      0x1E104100 
    7174 #define LTQ_DMA_SIZE           0x800 
    72 @@ -146,6 +151,11 @@ extern void ltq_pmu_enable(unsigned int 
     75@@ -147,6 +152,11 @@ extern void ltq_pmu_enable(unsigned int module); 
    7376 extern void ltq_pmu_disable(unsigned int module); 
    7477 extern void ltq_cgu_enable(unsigned int clk); 
     
    8285 { 
    8386        return (ltq_get_soc_type() == SOC_TYPE_AR9); 
     87diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c 
     88index f97e565..eab4644d 100644 
    8489--- a/arch/mips/lantiq/xway/devices.c 
    8590+++ b/arch/mips/lantiq/xway/devices.c 
     
    111116                ltq_etop.dev.platform_data = eth; 
    112117                platform_device_register(&ltq_etop); 
    113 --- a/drivers/net/lantiq_etop.c 
    114 +++ b/drivers/net/lantiq_etop.c 
    115 @@ -34,6 +34,7 @@ 
    116  #include <linux/init.h> 
    117  #include <linux/delay.h> 
    118  #include <linux/io.h> 
    119 +#include <linux/dma-mapping.h> 
    120   
    121  #include <asm/checksum.h> 
    122   
    123 @@ -69,10 +70,43 @@ 
     118diff --git a/drivers/net/ethernet/lantiq_etop.c b/drivers/net/ethernet/lantiq_etop.c 
     119index 0b3567a..d3d4931 100644 
     120--- a/drivers/net/ethernet/lantiq_etop.c 
     121+++ b/drivers/net/ethernet/lantiq_etop.c 
     122@@ -71,10 +71,43 @@ 
    124123 #define ETOP_MII_REVERSE       0xe 
    125124 #define ETOP_PLEN_UNDER                0x40 
    126125 #define ETOP_CGEN              0x800 
     126- 
     127-/* use 2 static channels for TX/RX */ 
    127128+#define ETOP_CFG_MII0          0x01 
    128   
    129 -/* use 2 static channels for TX/RX */ 
     129+ 
    130130+#define LTQ_GBIT_MDIO_CTL      0xCC 
    131131+#define LTQ_GBIT_MDIO_DATA     0xd0 
     
    167167 #define IS_RX(x)               (x == LTQ_ETOP_RX_CHANNEL) 
    168168  
    169 @@ -81,9 +115,15 @@ 
     169@@ -83,9 +116,15 @@ 
    170170 #define ltq_etop_w32_mask(x, y, z)     \ 
    171171                ltq_w32_mask(x, y, ltq_etop_membase + (z)) 
     
    183183 struct ltq_etop_chan { 
    184184        int idx; 
    185 @@ -108,6 +148,9 @@ struct ltq_etop_priv { 
     185@@ -110,6 +149,9 @@ struct ltq_etop_priv { 
    186186        spinlock_t lock; 
    187187 }; 
     
    193193 ltq_etop_alloc_skb(struct ltq_etop_chan *ch) 
    194194 { 
    195 @@ -209,7 +252,7 @@ static irqreturn_t 
     195@@ -211,7 +253,7 @@ static irqreturn_t 
    196196 ltq_etop_dma_irq(int irq, void *_priv) 
    197197 { 
     
    202202        napi_schedule(&priv->ch[ch].napi); 
    203203        return IRQ_HANDLED; 
    204 @@ -242,26 +285,66 @@ ltq_etop_hw_exit(struct net_device *dev) 
     204@@ -244,15 +286,43 @@ ltq_etop_hw_exit(struct net_device *dev) 
    205205                        ltq_etop_free_channel(dev, &priv->ch[i]); 
    206206 } 
     
    211211+       ltq_pmu_enable(PMU_SWITCH); 
    212212+ 
    213 +       ltq_gpio_request(42, 1, 0, 1, "MDIO"); 
    214 +       ltq_gpio_request(43, 1, 0, 1, "MDC"); 
     213+       ltq_gpio_request(42, 2, 1, "MDIO"); 
     214+       ltq_gpio_request(43, 2, 1, "MDC"); 
    215215+ 
    216216+       ltq_gbit_w32_mask(0, GCTL0_SE, LTQ_GBIT_GCTL0); 
     
    239239+       if (ltq_has_gbit()) { 
    240240+               ltq_etop_gbit_init(); 
     241+               /* force the etops link to the gbit to MII */ 
     242+               mii_mode = PHY_INTERFACE_MODE_MII; 
    241243+       } 
    242244+ 
    243245+       switch (mii_mode) { 
    244 +       case PHY_INTERFACE_MODE_RGMII: 
    245246        case PHY_INTERFACE_MODE_RMII: 
    246247                ltq_etop_w32_mask(ETOP_MII_MASK, 
    247248                        ETOP_MII_REVERSE, LTQ_ETOP_CFG); 
    248                 break; 
    249   
    250 +       case PHY_INTERFACE_MODE_GMII: 
    251         case PHY_INTERFACE_MODE_MII: 
    252                 ltq_etop_w32_mask(ETOP_MII_MASK, 
    253                         ETOP_MII_NORMAL, LTQ_ETOP_CFG); 
     249@@ -264,6 +334,18 @@ ltq_etop_hw_init(struct net_device *dev) 
    254250                break; 
    255251  
     
    270266                        priv->pldata->mii_mode); 
    271267                return -ENOTSUPP; 
    272 @@ -273,7 +356,7 @@ ltq_etop_hw_init(struct net_device *dev) 
     268@@ -275,7 +357,7 @@ ltq_etop_hw_init(struct net_device *dev) 
    273269        ltq_dma_init_port(DMA_PORT_ETOP); 
    274270  
     
    279275  
    280276                ch->idx = ch->dma.nr = i; 
    281 @@ -337,6 +420,39 @@ static const struct ethtool_ops ltq_etop 
     277@@ -339,6 +421,39 @@ static const struct ethtool_ops ltq_etop_ethtool_ops = { 
    282278 }; 
    283279  
     
    319315 { 
    320316        u32 val = MDIO_REQUEST | 
    321 @@ -377,14 +493,11 @@ ltq_etop_mdio_probe(struct net_device *d 
     317@@ -379,14 +494,11 @@ ltq_etop_mdio_probe(struct net_device *dev) 
    322318 { 
    323319        struct ltq_etop_priv *priv = netdev_priv(dev); 
     
    338334        if (!phydev) { 
    339335                netdev_err(dev, "no PHY found\n"); 
    340 @@ -406,6 +519,9 @@ ltq_etop_mdio_probe(struct net_device *d 
     336@@ -408,6 +520,9 @@ ltq_etop_mdio_probe(struct net_device *dev) 
    341337                              | SUPPORTED_Autoneg 
    342338                              | SUPPORTED_MII 
     
    348344        phydev->advertising = phydev->supported; 
    349345        priv->phydev = phydev; 
    350 @@ -431,8 +547,13 @@ ltq_etop_mdio_init(struct net_device *de 
     346@@ -433,8 +548,13 @@ ltq_etop_mdio_init(struct net_device *dev) 
    351347        } 
    352348  
     
    364360        snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0); 
    365361        priv->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); 
    366 @@ -522,9 +643,9 @@ ltq_etop_tx(struct sk_buff *skb, struct 
     362@@ -524,9 +644,9 @@ ltq_etop_tx(struct sk_buff *skb, struct net_device *dev) 
    367363        struct ltq_etop_priv *priv = netdev_priv(dev); 
    368364        struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1]; 
     
    375371        len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len; 
    376372  
    377 @@ -698,7 +819,7 @@ ltq_etop_probe(struct platform_device *p 
     373@@ -700,7 +820,7 @@ ltq_etop_probe(struct platform_device *pdev) 
    378374 { 
    379375        struct net_device *dev; 
     
    384380        int i; 
    385381  
    386 @@ -726,6 +847,23 @@ ltq_etop_probe(struct platform_device *p 
     382@@ -728,6 +848,23 @@ ltq_etop_probe(struct platform_device *pdev) 
    387383                goto err_out; 
    388384        } 
     
    408404        strcpy(dev->name, "eth%d"); 
    409405        dev->netdev_ops = &ltq_eth_netdev_ops; 
     406--  
     4071.7.7.1 
     408 
  • trunk/target/linux/lantiq/patches-3.2/0039-SPI-MIPS-lantiq-add-FALC-ON-spi-driver.patch

    r31059 r31060  
    1 From 2bd534c30688bcb3f70f1816fbcff813fc746103 Mon Sep 17 00:00:00 2001 
     1From 0ebdb2202a06d096114aa7676f02d5f426a20366 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Sat, 27 Aug 2011 18:12:26 +0200 
    4 Subject: [PATCH 13/24] MIPS: lantiq: adds FALC-ON spi driver 
     4Subject: [PATCH 39/70] SPI: MIPS: lantiq: add FALC-ON spi driver 
    55 
    66The external bus unit (EBU) found on the FALC-ON SoC has spi emulation that is 
    7 designed for serial flash access. 
     7designed for serial flash access. This driver has only been tested with m25p80 
     8type chips. The hardware has no support for other types of spi peripherals. 
    89 
    910Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
    1011Signed-off-by: John Crispin <blogic@openwrt.org> 
     12Cc: spi-devel-general@lists.sourceforge.net 
    1113--- 
    12  arch/mips/lantiq/falcon/devices.c        |   12 +- 
     14 arch/mips/lantiq/falcon/devices.c        |   13 + 
    1315 arch/mips/lantiq/falcon/devices.h        |    4 + 
    1416 arch/mips/lantiq/falcon/mach-easy98000.c |   27 ++ 
    1517 drivers/spi/Kconfig                      |    4 + 
    1618 drivers/spi/Makefile                     |    1 + 
    17  drivers/spi/spi-falcon.c                 |  477 ++++++++++++++++++++++++++++++ 
    18  6 files changed, 523 insertions(+), 2 deletions(-) 
     19 drivers/spi/spi-falcon.c                 |  483 ++++++++++++++++++++++++++++++ 
     20 6 files changed, 532 insertions(+), 0 deletions(-) 
    1921 create mode 100644 drivers/spi/spi-falcon.c 
    2022 
     23diff --git a/arch/mips/lantiq/falcon/devices.c b/arch/mips/lantiq/falcon/devices.c 
     24index 6cd7a88..92ec571 100644 
    2125--- a/arch/mips/lantiq/falcon/devices.c 
    2226+++ b/arch/mips/lantiq/falcon/devices.c 
    23 @@ -129,7 +129,7 @@ falcon_register_gpio_extra(void) 
    24   
    25  /* i2c */ 
    26  static struct resource falcon_i2c_resources[] = { 
    27 -       MEM_RES("i2c", GPON_I2C_BASE,GPON_I2C_END), 
    28 +       MEM_RES("i2c", LTQ_I2C_BASE_ADDR, LTQ_I2C_SIZE), 
    29         IRQ_RES("i2c_lb", FALCON_IRQ_I2C_LBREQ), 
    30         IRQ_RES("i2c_b", FALCON_IRQ_I2C_BREQ), 
    31         IRQ_RES("i2c_err", FALCON_IRQ_I2C_I2C_ERR), 
    32 @@ -140,10 +140,18 @@ void __init falcon_register_i2c(void) 
    33  { 
    34         platform_device_register_simple("i2c-falcon", 0, 
    35         falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources)); 
    36 -       sys1_hw_activate(ACTS_I2C_ACT); 
    37 +       ltq_sysctl_activate(SYSCTL_SYS1, ACTS_I2C_ACT); 
     27@@ -121,3 +121,16 @@ falcon_register_gpio_extra(void) 
     28        platform_device_register_simple("falcon_gpio", 4, 
     29                falcon_gpio4_res, ARRAY_SIZE(falcon_gpio4_res)); 
    3830 } 
    39   
    40 -void __init falcon_register_crypto(void) 
     31+ 
    4132+/* spi flash */ 
    4233+static struct platform_device ltq_spi = { 
     
    4738+void __init 
    4839+falcon_register_spi_flash(struct spi_board_info *data) 
    49  { 
    50 -       platform_device_register_simple("ltq_falcon_deu", 0, NULL, 0); 
     40+{ 
    5141+       spi_register_board_info(data, 1); 
    5242+       platform_device_register(&ltq_spi); 
    53  } 
     43+} 
     44diff --git a/arch/mips/lantiq/falcon/devices.h b/arch/mips/lantiq/falcon/devices.h 
     45index 18be8b6..5e6f720 100644 
    5446--- a/arch/mips/lantiq/falcon/devices.h 
    5547+++ b/arch/mips/lantiq/falcon/devices.h 
    56 @@ -11,11 +11,15 @@ 
     48@@ -11,10 +11,14 @@ 
    5749 #ifndef _FALCON_DEVICES_H__ 
    5850 #define _FALCON_DEVICES_H__ 
     
    6658 extern void falcon_register_gpio(void); 
    6759 extern void falcon_register_gpio_extra(void); 
    68  extern void falcon_register_i2c(void); 
    6960+extern void falcon_register_spi_flash(struct spi_board_info *data); 
    7061  
    7162 #endif 
     63diff --git a/arch/mips/lantiq/falcon/mach-easy98000.c b/arch/mips/lantiq/falcon/mach-easy98000.c 
     64index 361b8f0..1a7caad 100644 
    7265--- a/arch/mips/lantiq/falcon/mach-easy98000.c 
    7366+++ b/arch/mips/lantiq/falcon/mach-easy98000.c 
    74 @@ -40,6 +40,21 @@ struct physmap_flash_data easy98000_nor_ 
     67@@ -40,6 +40,21 @@ struct physmap_flash_data easy98000_nor_flash_data = { 
    7568        .parts          = easy98000_nor_partitions, 
    7669 }; 
     
    120113                        "EASY98000NAND", 
    121114                        "EASY98000 Eval Board (NAND Flash)", 
     115diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig 
     116index 8ba4510..b8424ba 100644 
    122117--- a/drivers/spi/Kconfig 
    123118+++ b/drivers/spi/Kconfig 
    124 @@ -189,6 +189,10 @@ config SPI_MPC52xx 
     119@@ -180,6 +180,10 @@ config SPI_MPC52xx 
    125120          This drivers supports the MPC52xx SPI controller in master SPI 
    126121          mode. 
     
    133128        tristate "Freescale MPC52xx PSC SPI controller" 
    134129        depends on PPC_MPC52xx && EXPERIMENTAL 
     130diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile 
     131index 61c3261..570894c 100644 
    135132--- a/drivers/spi/Makefile 
    136133+++ b/drivers/spi/Makefile 
    137 @@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_DW_MMIO)             += spi-dw-mmi 
     134@@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_DW_MMIO)             += spi-dw-mmio.o 
    138135 obj-$(CONFIG_SPI_DW_PCI)               += spi-dw-midpci.o 
    139136 spi-dw-midpci-objs                     := spi-dw-pci.o spi-dw-mid.o 
     
    143140 obj-$(CONFIG_SPI_FSL_ESPI)             += spi-fsl-espi.o 
    144141 obj-$(CONFIG_SPI_FSL_SPI)              += spi-fsl-spi.o 
     142diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c 
     143new file mode 100644 
     144index 0000000..447bbaa 
    145145--- /dev/null 
    146146+++ b/drivers/spi/spi-falcon.c 
    147 @@ -0,0 +1,477 @@ 
     147@@ -0,0 +1,483 @@ 
    148148+/* 
    149149+ *  This program is free software; you can redistribute it and/or modify it 
     
    288288+                               bytelen--; 
    289289+                               if (bytelen) { 
    290 +                                       /* more data: 
    291 +                                        * maybe address and/or dummy */ 
     290+                                       /* 
     291+                                        * more data: 
     292+                                        * maybe address and/or dummy 
     293+                                        */ 
    292294+                                       state = state_command_prepare; 
    293295+                                       break; 
     
    314316+                       break; 
    315317+               } 
    316 +               case state_command_prepare: /* collect tx data for 
    317 +                                              address and dummy phase */ 
     318+               /* collect tx data for address and dummy phase */ 
     319+               case state_command_prepare: 
    318320+               { 
    319321+                       /* txp is valid, already checked */ 
     
    354356+                               state = state_disable_cs; 
    355357+                       } else { 
    356 +                               /* go to end and expect another 
    357 +                                * call (read or write) */ 
     358+                               /* 
     359+                                * go to end and expect another 
     360+                                * call (read or write) 
     361+                                */ 
    358362+                               state = state_end; 
    359363+                       } 
     
    453457+{ 
    454458+       struct device *dev = &spi->dev; 
    455 +       const u32 ebuclk = CLOCK_100M; 
     459+       const u32 ebuclk = 100000000; 
    456460+       unsigned int i; 
    457461+       unsigned long flags; 
     
    487491+                    LTQ_SFTIME); 
    488492+ 
    489 +       /* set some bits of unused_wd, to not trigger HOLD/WP 
    490 +        * signals on non QUAD flashes */ 
     493+       /* 
     494+        * set some bits of unused_wd, to not trigger HOLD/WP 
     495+        * signals on non QUAD flashes 
     496+        */ 
    491497+       ltq_ebu_w32((SFIO_UNUSED_WD_MASK & (0x8 | 0x4)), LTQ_SFIO); 
    492498+ 
     
    623629+MODULE_LICENSE("GPL"); 
    624630+MODULE_DESCRIPTION("Lantiq Falcon SPI controller driver"); 
    625 --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
    626 +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
    627 @@ -48,6 +48,10 @@ 
    628   
    629  #define LTQ_EBU_MODCON  0x000C 
    630   
    631 +/* I2C */ 
    632 +#define LTQ_I2C_BASE_ADDR      0x1E200000 
    633 +#define LTQ_I2C_SIZE           0x00010000 
    634 + 
    635  /* GPIO */ 
    636  #define LTQ_GPIO0_BASE_ADDR     0x1D810000 
    637  #define LTQ_GPIO0_SIZE          0x0080 
    638 @@ -92,6 +96,7 @@ 
    639   
    640  /* Activation Status Register */ 
    641  #define ACTS_ASC1_ACT  0x00000800 
    642 +#define ACTS_I2C_ACT   0x00004000 
    643  #define ACTS_P0                0x00010000 
    644  #define ACTS_P1                0x00010000 
    645  #define ACTS_P2                0x00020000 
     631--  
     6321.7.7.1 
     633 
  • trunk/target/linux/lantiq/patches-3.2/0040-I2C-MIPS-lantiq-add-FALC-ON-i2c-bus-master.patch

    r31059 r31060  
    1 From 6437f41dfdf9475178e22ab0dd886af033f90cc2 Mon Sep 17 00:00:00 2001 
     1From 97050437c6a3ce59ce2c5a8286b9bc1c9f1b3b60 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    3 Date: Thu, 29 Sep 2011 21:10:16 +0200 
    4 Subject: [PATCH 11/24] MIPS: lantiq: adds falcon I2C 
     3Date: Fri, 4 Nov 2011 16:00:34 +0100 
     4Subject: [PATCH 40/70] I2C: MIPS: lantiq: add FALC-ON i2c bus master 
    55 
     6This patch adds the driver needed to make the I2C bus work on FALC-ON SoCs. 
     7 
     8Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> 
     9Signed-off-by: John Crispin <blogic@openwrt.org> 
     10Cc: linux-i2c@vger.kernel.org 
    611--- 
    7  arch/mips/lantiq/falcon/devices.c |   21 + 
    8  arch/mips/lantiq/falcon/devices.h |    1 + 
    9  drivers/i2c/busses/Kconfig        |    4 + 
    10  drivers/i2c/busses/Makefile       |    1 + 
    11  drivers/i2c/busses/i2c-falcon.c   |  815 +++++++++++++++++++++++++++++++++++++ 
    12  5 files changed, 842 insertions(+), 0 deletions(-) 
     12 .../include/asm/mach-lantiq/falcon/lantiq_soc.h    |    5 + 
     13 arch/mips/lantiq/falcon/clk.c                      |   44 - 
     14 arch/mips/lantiq/falcon/devices.c                  |   16 + 
     15 arch/mips/lantiq/falcon/devices.h                  |    1 + 
     16 arch/mips/lantiq/falcon/mach-easy98000.c           |    1 + 
     17 drivers/i2c/busses/Kconfig                         |   10 + 
     18 drivers/i2c/busses/Makefile                        |    1 + 
     19 drivers/i2c/busses/i2c-falcon.c                    | 1040 ++++++++++++++++++++ 
     20 8 files changed, 1074 insertions(+), 44 deletions(-) 
     21 delete mode 100644 arch/mips/lantiq/falcon/clk.c 
    1322 create mode 100644 drivers/i2c/busses/i2c-falcon.c 
    1423 
     24diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
     25index 120c56c..fff5ecd 100644 
     26--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
     27+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h 
     28@@ -72,6 +72,10 @@ 
     29 #define LTQ_PADCTRL4_BASE_ADDR  0x1E800600 
     30 #define LTQ_PADCTRL4_SIZE       0x0100 
     31  
     32+/* I2C */ 
     33+#define GPON_I2C_BASE          0x1E200000 
     34+#define GPON_I2C_SIZE          0x00010000 
     35+ 
     36 /* CHIP ID */ 
     37 #define LTQ_STATUS_BASE_ADDR   0x1E802000 
     38  
     39@@ -106,6 +110,7 @@ 
     40 #define ACTS_PADCTRL2  0x00200000 
     41 #define ACTS_PADCTRL3  0x00200000 
     42 #define ACTS_PADCTRL4  0x00400000 
     43+#define ACTS_I2C_ACT   0x00004000 
     44  
     45 /* global register ranges */ 
     46 extern __iomem void *ltq_ebu_membase; 
     47diff --git a/arch/mips/lantiq/falcon/clk.c b/arch/mips/lantiq/falcon/clk.c 
     48deleted file mode 100644 
     49index afe1b52..0000000 
     50--- a/arch/mips/lantiq/falcon/clk.c 
     51+++ /dev/null 
     52@@ -1,44 +0,0 @@ 
     53-/* 
     54- * This program is free software; you can redistribute it and/or modify it 
     55- * under the terms of the GNU General Public License version 2 as published 
     56- * by the Free Software Foundation. 
     57- * 
     58- * Copyright (C) 2011 Thomas Langer <thomas.langer@lantiq.com> 
     59- * Copyright (C) 2011 John Crispin <blogic@openwrt.org> 
     60- */ 
     61- 
     62-#include <linux/ioport.h> 
     63-#include <linux/export.h> 
     64- 
     65-#include <lantiq_soc.h> 
     66- 
     67-#include "devices.h" 
     68- 
     69-/* CPU0 Clock Control Register */ 
     70-#define LTQ_SYS1_CPU0CC                0x0040 
     71-/* clock divider bit */ 
     72-#define LTQ_CPU0CC_CPUDIV      0x0001 
     73- 
     74-unsigned int 
     75-ltq_get_io_region_clock(void) 
     76-{ 
     77-       return CLOCK_200M; 
     78-} 
     79-EXPORT_SYMBOL(ltq_get_io_region_clock); 
     80- 
     81-unsigned int 
     82-ltq_get_cpu_hz(void) 
     83-{ 
     84-       if (ltq_sys1_r32(LTQ_SYS1_CPU0CC) & LTQ_CPU0CC_CPUDIV) 
     85-               return CLOCK_200M; 
     86-       else 
     87-               return CLOCK_400M; 
     88-} 
     89-EXPORT_SYMBOL(ltq_get_cpu_hz); 
     90- 
     91-unsigned int 
     92-ltq_get_fpi_hz(void) 
     93-{ 
     94-       return CLOCK_100M; 
     95-} 
     96-EXPORT_SYMBOL(ltq_get_fpi_hz); 
     97diff --git a/arch/mips/lantiq/falcon/devices.c b/arch/mips/lantiq/falcon/devices.c 
     98index 92ec571..e684ed4 100644 
    1599--- a/arch/mips/lantiq/falcon/devices.c 
    16100+++ b/arch/mips/lantiq/falcon/devices.c 
    17 @@ -126,3 +126,24 @@ falcon_register_gpio_extra(void) 
    18         ltq_sysctl_activate(SYSCTL_SYS1, 
    19                 ACTS_PADCTRL3 | ACTS_PADCTRL4 | ACTS_P3 | ACTS_P4); 
     101@@ -134,3 +134,19 @@ falcon_register_spi_flash(struct spi_board_info *data) 
     102        spi_register_board_info(data, 1); 
     103        platform_device_register(&ltq_spi); 
    20104 } 
    21105+ 
    22106+/* i2c */ 
    23107+static struct resource falcon_i2c_resources[] = { 
    24 +       MEM_RES("i2c", GPON_I2C_BASE,GPON_I2C_END), 
    25 +       IRQ_RES("i2c_lb", FALCON_IRQ_I2C_LBREQ), 
    26 +       IRQ_RES("i2c_b", FALCON_IRQ_I2C_BREQ), 
    27 +       IRQ_RES("i2c_err", FALCON_IRQ_I2C_I2C_ERR), 
    28 +       IRQ_RES("i2c_p", FALCON_IRQ_I2C_I2C_P), 
     108+       MEM_RES("i2c", GPON_I2C_BASE, GPON_I2C_SIZE), 
     109+       IRQ_RES(i2c_lb, FALCON_IRQ_I2C_LBREQ), 
     110+       IRQ_RES(i2c_b, FALCON_IRQ_I2C_BREQ), 
     111+       IRQ_RES(i2c_err, FALCON_IRQ_I2C_I2C_ERR), 
     112+       IRQ_RES(i2c_p, FALCON_IRQ_I2C_I2C_P), 
    29113+}; 
    30114+ 
    31 +void __init falcon_register_i2c(void) 
     115+void __init 
     116+falcon_register_i2c(void) 
    32117+{ 
    33118+       platform_device_register_simple("i2c-falcon", 0, 
    34 +       falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources)); 
    35 +       sys1_hw_activate(ACTS_I2C_ACT); 
    36 +} 
    37 + 
    38 +void __init falcon_register_crypto(void) 
    39 +{ 
    40 +       platform_device_register_simple("ltq_falcon_deu", 0, NULL, 0); 
    41 +} 
     119+               falcon_i2c_resources, ARRAY_SIZE(falcon_i2c_resources)); 
     120+} 
     121diff --git a/arch/mips/lantiq/falcon/devices.h b/arch/mips/lantiq/falcon/devices.h 
     122index 5e6f720..d81edbe 100644 
    42123--- a/arch/mips/lantiq/falcon/devices.h 
    43124+++ b/arch/mips/lantiq/falcon/devices.h 
    44 @@ -16,5 +16,6 @@ 
    45  extern void falcon_register_nand(void); 
     125@@ -20,5 +20,6 @@ extern void falcon_register_nand(void); 
    46126 extern void falcon_register_gpio(void); 
    47127 extern void falcon_register_gpio_extra(void); 
     128 extern void falcon_register_spi_flash(struct spi_board_info *data); 
    48129+extern void falcon_register_i2c(void); 
    49130  
    50131 #endif 
     132diff --git a/arch/mips/lantiq/falcon/mach-easy98000.c b/arch/mips/lantiq/falcon/mach-easy98000.c 
     133index 1a7caad..fc5720d 100644 
     134--- a/arch/mips/lantiq/falcon/mach-easy98000.c 
     135+++ b/arch/mips/lantiq/falcon/mach-easy98000.c 
     136@@ -98,6 +98,7 @@ easy98000_init_common(void) 
     137 { 
     138        spi_register_board_info(&easy98000_spi_gpio_devices, 1); 
     139        platform_device_register(&easy98000_spi_gpio_device); 
     140+       falcon_register_i2c(); 
     141 } 
     142  
     143 static void __init 
     144diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig 
     145index a3afac4..41be6cc 100644 
    51146--- a/drivers/i2c/busses/Kconfig 
    52147+++ b/drivers/i2c/busses/Kconfig 
    53 @@ -284,6 +284,10 @@ config I2C_POWERMAC 
    54   
    55  comment "I2C system bus drivers (mostly embedded / system-on-chip)" 
     148@@ -369,6 +369,16 @@ config I2C_DESIGNWARE_PCI 
     149          This driver can also be built as a module.  If so, the module 
     150          will be called i2c-designware-pci. 
    56151  
    57152+config I2C_FALCON 
    58153+       tristate "Falcon I2C interface" 
    59 +#      depends on SOC_FALCON 
    60 + 
    61  config I2C_AT91 
    62         tristate "Atmel AT91 I2C Two-Wire interface (TWI)" 
    63         depends on ARCH_AT91 && EXPERIMENTAL && BROKEN 
     154+       depends on SOC_FALCON 
     155+       help 
     156+         If you say yes to this option, support will be included for the 
     157+         Lantiq FALC-ON I2C core. 
     158+ 
     159+         This driver can also be built as a module. If so, the module 
     160+         will be called i2c-falcon. 
     161+ 
     162 config I2C_GPIO 
     163        tristate "GPIO-based bitbanging I2C" 
     164        depends on GENERIC_GPIO 
     165diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile 
     166index fba6da6..36239c8 100644 
    64167--- a/drivers/i2c/busses/Makefile 
    65168+++ b/drivers/i2c/busses/Makefile 
    66 @@ -82,5 +82,6 @@ obj-$(CONFIG_I2C_SIBYTE)      += i2c-sibyte.o 
    67  obj-$(CONFIG_I2C_STUB)         += i2c-stub.o 
    68  obj-$(CONFIG_SCx200_ACB)       += scx200_acb.o 
    69  obj-$(CONFIG_SCx200_I2C)       += scx200_i2c.o 
     169@@ -37,6 +37,7 @@ obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o 
     170 i2c-designware-platform-objs := i2c-designware-platdrv.o i2c-designware-core.o 
     171 obj-$(CONFIG_I2C_DESIGNWARE_PCI)       += i2c-designware-pci.o 
     172 i2c-designware-pci-objs := i2c-designware-pcidrv.o i2c-designware-core.o 
    70173+obj-$(CONFIG_I2C_FALCON)       += i2c-falcon.o 
    71   
    72  ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG 
     174 obj-$(CONFIG_I2C_GPIO)         += i2c-gpio.o 
     175 obj-$(CONFIG_I2C_HIGHLANDER)   += i2c-highlander.o 
     176 obj-$(CONFIG_I2C_IBM_IIC)      += i2c-ibm_iic.o 
     177diff --git a/drivers/i2c/busses/i2c-falcon.c b/drivers/i2c/busses/i2c-falcon.c 
     178new file mode 100644 
     179index 0000000..fc4f0eb 
    73180--- /dev/null 
    74181+++ b/drivers/i2c/busses/i2c-falcon.c 
    75 @@ -0,0 +1,815 @@ 
     182@@ -0,0 +1,1040 @@ 
    76183+/* 
    77184+ * Lantiq FALC(tm) ON - I2C bus adapter 
     
    92199+ * along with this program; if not, write to the Free Software 
    93200+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 
     201+ * 
     202+ * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com> 
    94203+ */ 
    95204+ 
    96 +/* #define DEBUG */ 
     205+/* 
     206+ * CURRENT ISSUES: 
     207+ * - no high speed support 
     208+ * - supports only master mode 
     209+ * - ten bit mode is not tested (no slave devices) 
     210+ */ 
    97211+ 
    98212+#include <linux/kernel.h> 
    99213+#include <linux/module.h> 
    100214+#include <linux/delay.h> 
    101 +#include <linux/slab.h> /* for kzalloc, kfree */ 
     215+#include <linux/slab.h> 
    102216+#include <linux/i2c.h> 
    103217+#include <linux/clk.h> 
     
    108222+#include <linux/platform_device.h> 
    109223+#include <linux/io.h> 
     224+#include <linux/err.h> 
    110225+#include <linux/gpio.h> 
    111226+ 
    112 +#include <falcon/lantiq_soc.h> 
    113 + 
    114 +/* CURRENT ISSUES: 
    115 + * - no high speed support 
    116 + * - supports only master mode 
    117 + * - ten bit mode is not tested (no slave devices) 
     227+#include <lantiq_soc.h> 
     228+ 
     229+/* I2C Identification Register */ 
     230+/* Module ID */ 
     231+#define I2C_ID_ID_MASK 0x0000FF00 
     232+/* field offset */ 
     233+#define I2C_ID_ID_OFFSET 8 
     234+/* Revision */ 
     235+#define I2C_ID_REV_MASK 0x000000FF 
     236+/* field offset */ 
     237+#define I2C_ID_REV_OFFSET 0 
     238+ 
     239+/* I2C Error Interrupt Request Source Status Register */ 
     240+/* TXF_OFL */ 
     241+#define I2C_ERR_IRQSS_TXF_OFL 0x00000008 
     242+/* TXF_UFL */ 
     243+#define I2C_ERR_IRQSS_TXF_UFL 0x00000004 
     244+/* RXF_OFL */ 
     245+#define I2C_ERR_IRQSS_RXF_OFL 0x00000002 
     246+/* RXF_UFL */ 
     247+#define I2C_ERR_IRQSS_RXF_UFL 0x00000001 
     248+ 
     249+/* I2C Bus Status Register */ 
     250+/* Bus Status */ 
     251+#define I2C_BUS_STAT_BS_MASK 0x00000003 
     252+/* I2C Bus is free. */ 
     253+#define I2C_BUS_STAT_BS_FREE 0x00000000 
     254+/* 
     255+ * The device is working as master and has claimed the control 
     256+ * on the I2C-bus (busy master). 
    118257+ */ 
     258+#define I2C_BUS_STAT_BS_BM 0x00000002 
     259+ 
     260+/* I2C Interrupt Clear Register */ 
     261+/* Clear */ 
     262+#define I2C_ICR_BREQ_INT_CLR 0x00000008 
     263+/* Clear */ 
     264+#define I2C_ICR_LBREQ_INT_CLR 0x00000004 
     265+ 
     266+/* I2C RUN Control Register */ 
     267+/* Enable */ 
     268+#define I2C_RUN_CTRL_RUN_EN 0x00000001 
     269+ 
     270+/* I2C Kernel Clock Control Register */ 
     271+/* field offset */ 
     272+#define I2C_CLC_RMC_OFFSET 8 
     273+/* Enable */ 
     274+#define I2C_IMSC_I2C_P_INT_EN 0x00000020 
     275+/* Enable */ 
     276+#define I2C_IMSC_I2C_ERR_INT_EN 0x00000010 
     277+/* Enable */ 
     278+#define I2C_IMSC_BREQ_INT_EN 0x00000008 
     279+/* Enable */ 
     280+#define I2C_IMSC_LBREQ_INT_EN 0x00000004 
     281+ 
     282+/* I2C Fractional Divider Configuration Register */ 
     283+/* field offset */ 
     284+#define I2C_FDIV_CFG_INC_OFFSET 16 
     285+/* field offset */ 
     286+#define I2C_FDIV_CFG_DEC_OFFSET 0 
     287+ 
     288+/* I2C Fractional Divider (highspeed mode) Configuration Register */ 
     289+/* field offset */ 
     290+#define I2C_FDIV_HIGH_CFG_INC_OFFSET 16 
     291+/* field offset */ 
     292+#define I2C_FDIV_HIGH_CFG_DEC_OFFSET 0 
     293+ 
     294+/* I2C Address Register */ 
     295+/* Enable */ 
     296+#define I2C_ADDR_CFG_SOPE_EN 0x00200000 
     297+/* Enable */ 
     298+#define I2C_ADDR_CFG_SONA_EN 0x00100000 
     299+/* Enable */ 
     300+#define I2C_ADDR_CFG_MnS_EN 0x00080000 
     301+ 
     302+/* I2C Protocol Interrupt Request Source Status Register */ 
     303+/* RX */ 
     304+#define I2C_P_IRQSS_RX 0x00000040 
     305+/* TX_END */ 
     306+#define I2C_P_IRQSS_TX_END 0x00000020 
     307+/* NACK */ 
     308+#define I2C_P_IRQSS_NACK 0x00000010 
     309+/* AL */ 
     310+#define I2C_P_IRQSS_AL 0x00000008 
     311+ 
     312+/* I2C Raw Interrupt Status Register */ 
     313+/* Read: Interrupt occurred. */ 
     314+#define I2C_RIS_I2C_P_INT_INTOCC 0x00000020 
     315+/* Read: Interrupt occurred. */ 
     316+#define I2C_RIS_I2C_ERR_INT_INTOCC 0x00000010 
     317+ 
     318+/* I2C End Data Control Register */ 
     319+/* 
     320+ * Set End of Transmission - Note: Do not write '1' to this bit when bus is 
     321+ * free. This will cause an abort after the first byte when a new transfer 
     322+ * is started. 
     323+ */ 
     324+#define I2C_ENDD_CTRL_SETEND 0x00000002 
     325+/* TX FIFO Flow Control */ 
     326+#define I2C_FIFO_CFG_TXFC 0x00020000 
     327+/* RX FIFO Flow Control */ 
     328+#define I2C_FIFO_CFG_RXFC 0x00010000 
     329+/* Word aligned (character alignment of four characters) */ 
     330+#define I2C_FIFO_CFG_TXFA_TXFA2 0x00002000 
     331+/* Word aligned (character alignment of four characters) */ 
     332+#define I2C_FIFO_CFG_RXFA_RXFA2 0x00000200 
     333+/* 1 word */ 
     334+#define I2C_FIFO_CFG_TXBS_TXBS0 0x00000000 
     335+/* 1 word */ 
     336+#define I2C_FIFO_CFG_RXBS_RXBS0 0x00000000 
     337+ 
     338+ 
     339+/* I2C register structure */ 
     340+struct gpon_reg_i2c { 
     341+       /* I2C Kernel Clock Control Register */ 
     342+       unsigned int clc; /* 0x00000000 */ 
     343+       /* Reserved */ 
     344+       unsigned int res_0; /* 0x00000004 */ 
     345+       /* I2C Identification Register */ 
     346+       unsigned int id; /* 0x00000008 */ 
     347+       /* Reserved */ 
     348+       unsigned int res_1; /* 0x0000000C */ 
     349+       /* 
     350+        * I2C RUN Control Register - This register enables and disables the I2C 
     351+        * peripheral. Before enabling, the I2C has to be configured properly. 
     352+        * After enabling no configuration is possible 
     353+        */ 
     354+       unsigned int run_ctrl; /* 0x00000010 */ 
     355+       /* 
     356+        * I2C End Data Control Register - This register is used to either turn 
     357+        * around the data transmission direction or to address another slave 
     358+        * without sending a stop condition. Also the software can stop the 
     359+        * slave-transmitter by sending a not-accolade when working as 
     360+        * master-receiver or even stop data transmission immediately when 
     361+        * operating as master-transmitter. The writing to the bits of this 
     362+        * control register is only effective when in MASTER RECEIVES BYTES, 
     363+        * MASTER TRANSMITS BYTES, MASTER RESTART or SLAVE RECEIVE BYTES state 
     364+        */ 
     365+       unsigned int endd_ctrl; /* 0x00000014 */ 
     366+       /* 
     367+        * I2C Fractional Divider Configuration Register - These register is 
     368+        * used to program the fractional divider of the I2C bus. Before the 
     369+        * peripheral is switched on by setting the RUN-bit the two (fixed) 
     370+        * values for the two operating frequencies are programmed into these 
     371+        * (configuration) registers. The Register FDIV_HIGH_CFG has the same 
     372+        * layout as I2C_FDIV_CFG. 
     373+        */ 
     374+       unsigned int fdiv_cfg; /* 0x00000018 */ 
     375+       /* 
     376+        * I2C Fractional Divider (highspeed mode) Configuration Register 
     377+        * These register is used to program the fractional divider of the I2C 
     378+        * bus. Before the peripheral is switched on by setting the RUN-bit the 
     379+        * two (fixed) values for the two operating frequencies are programmed 
     380+        * into these (configuration) registers. The Register FDIV_CFG has the 
     381+        * same layout as I2C_FDIV_CFG. 
     382+        */ 
     383+       unsigned int fdiv_high_cfg; /* 0x0000001C */ 
     384+       /* I2C Address Configuration Register */ 
     385+       unsigned int addr_cfg; /* 0x00000020 */ 
     386+       /* 
     387+        * I2C Bus Status Register - This register gives a status information 
     388+        * of the I2C. This additional information can be used by the software 
     389+        * to start proper actions. 
     390+        */ 
     391+       unsigned int bus_stat; /* 0x00000024 */ 
     392+       /* I2C FIFO Configuration Register */ 
     393+       unsigned int fifo_cfg; /* 0x00000028 */ 
     394+       /* I2C Maximum Received Packet Size Register */ 
     395+       unsigned int mrps_ctrl; /* 0x0000002C */ 
     396+       /* I2C Received Packet Size Status Register */ 
     397+       unsigned int rps_stat; /* 0x00000030 */ 
     398+       /* I2C Transmit Packet Size Register */ 
     399+       unsigned int tps_ctrl; /* 0x00000034 */ 
     400+       /* I2C Filled FIFO Stages Status Register */ 
     401+       unsigned int ffs_stat; /* 0x00000038 */ 
     402+       /* Reserved */ 
     403+       unsigned int res_2; /* 0x0000003C */ 
     404+       /* I2C Timing Configuration Register */ 
     405+       unsigned int tim_cfg; /* 0x00000040 */ 
     406+       /* Reserved */ 
     407+               unsigned int res_3[7]; /* 0x00000044 */ 
     408+       /* I2C Error Interrupt Request Source Mask Register */ 
     409+       unsigned int err_irqsm; /* 0x00000060 */ 
     410+       /* I2C Error Interrupt Request Source Status Register */ 
     411+       unsigned int err_irqss; /* 0x00000064 */ 
     412+       /* I2C Error Interrupt Request Source Clear Register */ 
     413+       unsigned int err_irqsc; /* 0x00000068 */ 
     414+       /* Reserved */ 
     415+       unsigned int res_4; /* 0x0000006C */ 
     416+       /* I2C Protocol Interrupt Request Source Mask Register */ 
     417+       unsigned int p_irqsm; /* 0x00000070 */ 
     418+       /* I2C Protocol Interrupt Request Source Status Register */ 
     419+       unsigned int p_irqss; /* 0x00000074 */ 
     420+       /* I2C Protocol Interrupt Request Source Clear Register */ 
     421+       unsigned int p_irqsc; /* 0x00000078 */ 
     422+       /* Reserved */ 
     423+       unsigned int res_5; /* 0x0000007C */ 
     424+       /* I2C Raw Interrupt Status Register */ 
     425+       unsigned int ris; /* 0x00000080 */ 
     426+       /* I2C Interrupt Mask Control Register */ 
     427+       unsigned int imsc; /* 0x00000084 */ 
     428+       /* I2C Masked Interrupt Status Register */ 
     429+       unsigned int mis; /* 0x00000088 */ 
     430+       /* I2C Interrupt Clear Register */ 
     431+       unsigned int icr; /* 0x0000008C */ 
     432+       /* I2C Interrupt Set Register */ 
     433+       unsigned int isr; /* 0x00000090 */ 
     434+       /* I2C DMA Enable Register */ 
     435+       unsigned int dmae; /* 0x00000094 */ 
     436+       /* Reserved */ 
     437+       unsigned int res_6[8154]; /* 0x00000098 */ 
     438+       /* I2C Transmit Data Register */ 
     439+       unsigned int txd; /* 0x00008000 */ 
     440+       /* Reserved */ 
     441+       unsigned int res_7[4095]; /* 0x00008004 */ 
     442+       /* I2C Receive Data Register */ 
     443+       unsigned int rxd; /* 0x0000C000 */ 
     444+       /* Reserved */ 
     445+       unsigned int res_8[4095]; /* 0x0000C004 */ 
     446+}; 
    119447+ 
    120448+/* mapping for access macros */ 
     449+#define i2c    ((struct gpon_reg_i2c *)priv->membase) 
    121450+#define reg_r32(reg)           __raw_readl(reg) 
    122451+#define reg_w32(val, reg)      __raw_writel(val, reg) 
     
    125454+#define reg_r32_table(reg, idx) reg_r32(&((uint32_t *)&reg)[idx]) 
    126455+#define reg_w32_table(val, reg, idx) reg_w32(val, &((uint32_t *)&reg)[idx]) 
    127 +#define i2c    (priv->membase) 
    128 +#include <falcon/i2c_reg.h> 
     456+ 
     457+#define i2c_r32(reg) reg_r32(&i2c->reg) 
     458+#define i2c_w32(val, reg) reg_w32(val, &i2c->reg) 
     459+#define i2c_w32_mask(clear, set, reg) reg_w32_mask(clear, set, &i2c->reg) 
    129460+ 
    130461+#define DRV_NAME "i2c-falcon" 
     
    134465+ 
    135466+#ifdef DEBUG 
    136 +#define FALCON_I2C_XFER_TIMEOUT                25*HZ 
     467+#define FALCON_I2C_XFER_TIMEOUT                (25 * HZ) 
    137468+#else 
    138469+#define FALCON_I2C_XFER_TIMEOUT                HZ 
    139470+#endif 
    140471+#if defined(DEBUG) && 0 
    141 +#define PRINTK(arg...) printk(arg) 
     472+#define PRINTK(arg...) pr_info(arg) 
    142473+#else 
    143474+#define PRINTK(arg...) do {} while (0) 
     
    210541+{ 
    211542+       struct i2c_msg *msg = priv->current_msg; 
    212 +       int rd = !!(msg->flags & I2C_M_RD);     /* extends to 0 or 1 */ 
     543+       int rd = !!(msg->flags & I2C_M_RD); 
    213544+       u16 addr = msg->addr; 
    214545+ 
     
    234565+       int len = (msg->flags & I2C_M_TEN) ? 2 : 1; 
    235566+ 
    236 +       PRINTK("set_tx_len %cX\n", (msg->flags & I2C_M_RD)?'R':'T'); 
     567+       PRINTK("set_tx_len %cX\n", (msg->flags & I2C_M_RD) ? ('R') : ('T')); 
    237568+ 
    238569+       priv->status = STATUS_ADDR; 
     
    298629+ 
    299630+       /* configure address */ 
    300 +       i2c_w32(I2C_ADDR_CFG_SOPE_EN |  /* generate stop when no more data in the 
    301 +                                          fifo */ 
     631+       i2c_w32(I2C_ADDR_CFG_SOPE_EN |  /* generate stop when no more data 
     632+                                          in the fifo */ 
    302633+               I2C_ADDR_CFG_SONA_EN |  /* generate stop when NA received */ 
    303634+               I2C_ADDR_CFG_MnS_EN |   /* we are master device */ 
     
    340671+               last = 1; 
    341672+ 
    342 +       if (last) { 
     673+       if (last) 
    343674+               disable_burst_irq(priv); 
    344 +       } 
    345675+} 
    346676+ 
    347677+static void falcon_i2c_rx(struct falcon_i2c *priv, int last) 
    348678+{ 
    349 +       u32 fifo_stat,timeout; 
     679+       u32 fifo_stat, timeout; 
    350680+       if (priv->msg_buf_len && priv->msg_buf) { 
    351681+               timeout = 5000000; 
     
    407737+#if defined(DEBUG) 
    408738+       int i, j; 
    409 +       printk("Messages %d %s\n", num, rx ? "out" : "in"); 
     739+       pr_info("Messages %d %s\n", num, rx ? "out" : "in"); 
    410740+       for (i = 0; i < num; i++) { 
    411 +               printk("%2d %cX Msg(%d) addr=0x%X: ", i, 
    412 +                       (msgs[i].flags & I2C_M_RD)?'R':'T', 
     741+               pr_info("%2d %cX Msg(%d) addr=0x%X: ", i, 
     742+                       (msgs[i].flags & I2C_M_RD) ? ('R') : ('T'), 
    413743+                       msgs[i].len, msgs[i].addr); 
    414744+               if (!(msgs[i].flags & I2C_M_RD) || rx) { 
     
    471801+                       goto done; 
    472802+               } 
    473 +               if (--priv->msgs_num) { 
     803+               if (--priv->msgs_num) 
    474804+                       priv->current_msg++; 
    475 +               } 
    476805+       } 
    477806+       /* no error? */ 
     
    483812+       mutex_unlock(&priv->mutex); 
    484813+ 
    485 +       if (ret>=0) 
     814+       if (ret >= 0) 
    486815+               dump_msgs(msgs, num, 1); 
    487816+ 
     
    515844+               default: 
    516845+                       disable_burst_irq(priv); 
    517 +                       printk("Status R %d\n", priv->status); 
     846+                       PRINTK("Status R %d\n", priv->status); 
    518847+                       break; 
    519848+               } 
     
    530859+               default: 
    531860+                       disable_burst_irq(priv); 
    532 +                       printk("Status W %d\n", priv->status); 
     861+                       PRINTK("Status W %d\n", priv->status); 
    533862+                       break; 
    534863+               } 
     
    586915+static irqreturn_t falcon_i2c_isr(int irq, void *dev_id) 
    587916+{ 
    588 +       u32 i_raw, i_err=0; 
     917+       u32 i_raw, i_err = 0; 
    589918+       struct falcon_i2c *priv = dev_id; 
    590919+ 
     
    663992+       } 
    664993+ 
    665 +       clk = clk_get(&pdev->dev, "fpi"); 
     994+       clk = clk_get_fpi(); 
    666995+       if (IS_ERR(clk)) { 
    667996+               dev_err(&pdev->dev, "failed to get fpi clk\n"); 
     
    6711000+       if (clk_get_rate(clk) != 100000000) { 
    6721001+               dev_err(&pdev->dev, "input clock is not 100MHz\n"); 
     1002+               return -ENOENT; 
     1003+       } 
     1004+       clk = clk_get(&pdev->dev, NULL); 
     1005+       if (IS_ERR(clk)) { 
     1006+               dev_err(&pdev->dev, "failed to get i2c clk\n"); 
    6731007+               return -ENOENT; 
    6741008+       } 
     
    6951029+       mutex_init(&priv->mutex); 
    6961030+ 
    697 +       ret = ltq_gpio_request(107, 0, 0, 0, DRV_NAME":sda"); 
    698 +       if (ret) { 
    699 +               dev_err(&pdev->dev, "I2C gpio 107 (sda) not available\n"); 
    700 +               ret = -ENXIO; 
    701 +               goto err_free_priv; 
    702 +       } 
    703 +       ret = ltq_gpio_request(108, 0, 0, 0, DRV_NAME":scl"); 
    704 +       if (ret) { 
    705 +               gpio_free(107); 
    706 +               dev_err(&pdev->dev, "I2C gpio 108 (scl) not available\n"); 
     1031+       if (ltq_gpio_request(&pdev->dev, 107, 0, 0, DRV_NAME":sda") || 
     1032+               ltq_gpio_request(&pdev->dev, 108, 0, 0, DRV_NAME":scl")) 
     1033+       { 
     1034+               dev_err(&pdev->dev, "I2C gpios not available\n"); 
    7071035+               ret = -ENXIO; 
    7081036+               goto err_free_priv; 
     
    7301058+                         irqres_lb->name, priv); 
    7311059+       if (ret) { 
    732 +               dev_err(&pdev->dev, "can't get last burst IRQ %d\n", irqres_lb->start); 
     1060+               dev_err(&pdev->dev, "can't get last burst IRQ %d\n", 
     1061+                                       irqres_lb->start); 
    7331062+               ret = -ENODEV; 
    7341063+               goto err_unmap_mem; 
     
    7391068+                         irqres_b->name, priv); 
    7401069+       if (ret) { 
    741 +               dev_err(&pdev->dev, "can't get burst IRQ %d\n", irqres_b->start); 
     1070+               dev_err(&pdev->dev, "can't get burst IRQ %d\n", 
     1071+                                       irqres_b->start); 
    7421072+               ret = -ENODEV; 
    7431073+               goto err_free_lb_irq; 
     
    7481078+                         irqres_err->name, priv); 
    7491079+       if (ret) { 
    750 +               dev_err(&pdev->dev, "can't get error IRQ %d\n", irqres_err->start); 
     1080+               dev_err(&pdev->dev, "can't get error IRQ %d\n", 
     1081+                                       irqres_err->start); 
    7511082+               ret = -ENODEV; 
    7521083+               goto err_free_b_irq; 
     
    7571088+                         irqres_p->name, priv); 
    7581089+       if (ret) { 
    759 +               dev_err(&pdev->dev, "can't get protocol IRQ %d\n", irqres_p->start); 
     1090+               dev_err(&pdev->dev, "can't get protocol IRQ %d\n", 
     1091+                                       irqres_p->start); 
    7601092+               ret = -ENODEV; 
    7611093+               goto err_free_err_irq; 
     
    8891221+MODULE_LICENSE("GPL"); 
    8901222+MODULE_VERSION(DRV_VERSION); 
     1223--  
     12241.7.7.1 
     1225 
  • trunk/target/linux/lantiq/patches-3.2/0042-SPI-MIPS-lantiq-adds-spi-xway.patch

    r31059 r31060  
    1 From e29263339db41d49d79482c93463c4c0cbe764d7 Mon Sep 17 00:00:00 2001 
     1From b257baf20b44e97770a2654a07f196fcbcd46e92 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    3 Date: Fri, 30 Sep 2011 14:23:42 +0200 
    4 Subject: [PATCH 14/24] MIPS: lantiq: adds xway spi 
     3Date: Mon, 10 Oct 2011 22:29:13 +0200 
     4Subject: [PATCH 42/70] SPI: MIPS: lantiq: adds spi xway 
    55 
    66--- 
    77 .../mips/include/asm/mach-lantiq/lantiq_platform.h |    9 + 
    88 .../mips/include/asm/mach-lantiq/xway/lantiq_irq.h |    2 + 
    9  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    1 + 
    109 drivers/spi/Kconfig                                |    8 + 
    11  drivers/spi/Makefile                               |    2 +- 
    12  drivers/spi/spi-xway.c                             | 1062 ++++++++++++++++++++ 
    13  6 files changed, 1083 insertions(+), 1 deletions(-) 
     10 drivers/spi/Makefile                               |    1 + 
     11 drivers/spi/spi-xway.c                             | 1068 ++++++++++++++++++++ 
     12 5 files changed, 1088 insertions(+), 0 deletions(-) 
    1413 create mode 100644 drivers/spi/spi-xway.c 
    1514 
     15diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h 
     16index a305f1d..38ed938 100644 
    1617--- a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h 
    1718+++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h 
     
    3031+ 
    3132 #endif 
     33diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h 
     34index 2a8d5ad..b7f10e6 100644 
    3235--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h 
    3336+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h 
     
    4144  
    4245 #define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21) 
    43 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    44 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    45 @@ -81,6 +81,7 @@ 
    46   
    47  #define PMU_DMA                        0x0020 
    48  #define PMU_USB                        0x8041 
    49 +#define PMU_SPI                        0x0100 
    50  #define PMU_LED                        0x0800 
    51  #define PMU_GPT                        0x1000 
    52  #define PMU_PPE                        0x2000 
     46diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig 
     47index b8424ba..ca4189c 100644 
    5348--- a/drivers/spi/Kconfig 
    5449+++ b/drivers/spi/Kconfig 
    55 @@ -393,6 +393,14 @@ config SPI_NUC900 
     50@@ -384,6 +384,14 @@ config SPI_NUC900 
    5651        help 
    5752          SPI driver for Nuvoton NUC900 series ARM SoCs 
     
    6863 # Add new SPI master controllers in alphabetical order above this line 
    6964 # 
     65diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile 
     66index 570894c..a465d9a 100644 
    7067--- a/drivers/spi/Makefile 
    7168+++ b/drivers/spi/Makefile 
    72 @@ -60,4 +60,5 @@ obj-$(CONFIG_SPI_TLE62X0)             += spi-tle62x 
     69@@ -59,4 +59,5 @@ obj-$(CONFIG_SPI_TLE62X0)             += spi-tle62x0.o 
    7370 obj-$(CONFIG_SPI_TOPCLIFF_PCH)         += spi-topcliff-pch.o 
    7471 obj-$(CONFIG_SPI_TXX9)                 += spi-txx9.o 
     
    7673+obj-$(CONFIG_SPI_XWAY)                 += spi-xway.o 
    7774  
     75diff --git a/drivers/spi/spi-xway.c b/drivers/spi/spi-xway.c 
     76new file mode 100644 
     77index 0000000..016a6d0 
    7878--- /dev/null 
    7979+++ b/drivers/spi/spi-xway.c 
    80 @@ -0,0 +1,1062 @@ 
     80@@ -0,0 +1,1068 @@ 
    8181+/* 
    8282+ * Lantiq SoC SPI controller 
     
    235235+       struct device           *dev; 
    236236+       void __iomem            *base; 
    237 +       struct clk              *clk; 
     237+       struct clk              *fpiclk; 
     238+       struct clk              *spiclk; 
    238239+ 
    239240+       int                     status; 
     
    268269+struct ltq_spi_cs_gpio_map { 
    269270+       unsigned        gpio; 
    270 +       unsigned        altsel0; 
    271 +       unsigned        altsel1; 
     271+       unsigned        mux; 
    272272+}; 
    273273+ 
     
    310310+ 
    311311+       /* Power-up mdule */ 
    312 +       ltq_pmu_enable(PMU_SPI); 
     312+        clk_enable(hw->spiclk); 
    313313+ 
    314314+       /* 
     
    326326+ 
    327327+       /* Power-down mdule */ 
    328 +       ltq_pmu_disable(PMU_SPI); 
     328+        clk_disable(hw->spiclk); 
    329329+} 
    330330+ 
     
    476476+        * divider value in CLC.RMS which is always set to 1. 
    477477+        */ 
    478 +       spi_clk = clk_get_rate(hw->clk); 
     478+       spi_clk = clk_get_rate(hw->fpiclk); 
    479479+ 
    480480+       /* 
     
    629629+ 
    630630+static const struct ltq_spi_cs_gpio_map ltq_spi_cs[] = { 
    631 +       { 15, 1, 0 }, 
    632 +       { 22, 1, 0 }, 
    633 +       { 13, 0, 1 }, 
    634 +       { 10, 0, 1 }, 
    635 +       {  9, 0, 1 }, 
    636 +       { 11, 1, 1 }, 
     631+       { 15, 2 }, 
     632+       { 22, 2 }, 
     633+       { 13, 1 }, 
     634+       { 10, 1 }, 
     635+       {  9, 1 }, 
     636+       { 11, 3 }, 
    637637+}; 
    638638+ 
     
    681681+               cstate->cs_deactivate = ltq_spi_gpio_cs_deactivate; 
    682682+       } else { 
    683 +               ret = ltq_gpio_request(ltq_spi_cs[spi->chip_select].gpio, 
    684 +                               ltq_spi_cs[spi->chip_select].altsel0, 
    685 +                               ltq_spi_cs[spi->chip_select].altsel1, 
     683+               ret = ltq_gpio_request(&spi->dev, ltq_spi_cs[spi->chip_select].gpio, 
     684+                               ltq_spi_cs[spi->chip_select].mux, 
    686685+                               1, "spi-cs"); 
    687686+               if (ret) 
     
    990989+       } 
    991990+ 
    992 +       hw->clk = clk_get(&pdev->dev, "fpi"); 
    993 +       if (IS_ERR(hw->clk)) { 
     991+       hw->fpiclk = clk_get_fpi(); 
     992+       if (IS_ERR(hw->fpiclk)) { 
    994993+               dev_err(&pdev->dev, "clk_get\n"); 
    995 +               ret = PTR_ERR(hw->clk); 
     994+               ret = PTR_ERR(hw->fpiclk); 
     995+               goto err_master; 
     996+       } 
     997+ 
     998+       hw->spiclk = clk_get(&pdev->dev, NULL); 
     999+       if (IS_ERR(hw->spiclk)) { 
     1000+               dev_err(&pdev->dev, "clk_get\n"); 
     1001+               ret = PTR_ERR(hw->spiclk); 
    9961002+               goto err_master; 
    9971003+       } 
     
    10291035+ 
    10301036+       /* Set GPIO alternate functions to SPI */ 
    1031 +       ltq_gpio_request(LTQ_SPI_GPIO_DI, 1, 0, 0, "spi-di"); 
    1032 +       ltq_gpio_request(LTQ_SPI_GPIO_DO, 1, 0, 1, "spi-do"); 
    1033 +       ltq_gpio_request(LTQ_SPI_GPIO_CLK, 1, 0, 1, "spi-clk"); 
     1037+       ltq_gpio_request(&pdev->dev, LTQ_SPI_GPIO_DI, 2, 0, "spi-di"); 
     1038+       ltq_gpio_request(&pdev->dev, LTQ_SPI_GPIO_DO, 2, 1, "spi-do"); 
     1039+       ltq_gpio_request(&pdev->dev, LTQ_SPI_GPIO_CLK, 2, 1, "spi-clk"); 
    10341040+ 
    10351041+       ltq_spi_hw_enable(hw); 
     
    10771083+ 
    10781084+err_irq: 
    1079 +       clk_put(hw->clk); 
     1085+       clk_put(hw->fpiclk); 
    10801086+ 
    10811087+       for (; i > 0; i--) 
     
    11111117+       gpio_free(LTQ_SPI_GPIO_CLK); 
    11121118+ 
    1113 +       clk_put(hw->clk); 
     1119+       clk_put(hw->fpiclk); 
    11141120+       spi_master_put(hw->bitbang.master); 
    11151121+ 
     
    11191125+static struct platform_driver ltq_spi_driver = { 
    11201126+       .driver = { 
    1121 +                  .name = "ltq-spi", 
     1127+                  .name = "ltq_spi", 
    11221128+                  .owner = THIS_MODULE, 
    11231129+                  }, 
     
    11411147+MODULE_LICENSE("GPL"); 
    11421148+MODULE_ALIAS("platform:ltq-spi"); 
     1149--  
     11501.7.7.1 
     1151 
  • trunk/target/linux/lantiq/patches-3.2/0047-MIPS-lantiq-adds-GPTU-driver.patch

    r31059 r31060  
    1 From 45dbb232686978816e8148753e12f27caa2b2eb3 Mon Sep 17 00:00:00 2001 
     1From b672c54f9ae4504687a80bb51cdfe102bdae96e1 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 29 Sep 2011 17:16:38 +0200 
    4 Subject: [PATCH 17/24] MIPS: lantiq: adds GPTU driver 
     4Subject: [PATCH 47/70] MIPS: lantiq: adds GPTU driver 
    55 
    66--- 
    77 arch/mips/include/asm/mach-lantiq/lantiq_timer.h |  155 ++++ 
    88 arch/mips/lantiq/xway/Makefile                   |    2 +- 
    9  arch/mips/lantiq/xway/timer.c                    |  830 ++++++++++++++++++++++ 
    10  3 files changed, 986 insertions(+), 1 deletions(-) 
     9 arch/mips/lantiq/xway/sysctrl.c                  |    1 + 
     10 arch/mips/lantiq/xway/timer.c                    |  846 ++++++++++++++++++++++ 
     11 4 files changed, 1003 insertions(+), 1 deletions(-) 
    1112 create mode 100644 arch/mips/include/asm/mach-lantiq/lantiq_timer.h 
    1213 create mode 100644 arch/mips/lantiq/xway/timer.c 
    1314 
     15diff --git a/arch/mips/include/asm/mach-lantiq/lantiq_timer.h b/arch/mips/include/asm/mach-lantiq/lantiq_timer.h 
     16new file mode 100644 
     17index 0000000..ef564ab 
    1418--- /dev/null 
    1519+++ b/arch/mips/include/asm/mach-lantiq/lantiq_timer.h 
     
    170174+ 
    171175+#endif /* __DANUBE_GPTU_DEV_H__2005_07_26__10_19__ */ 
     176diff --git a/arch/mips/lantiq/xway/Makefile b/arch/mips/lantiq/xway/Makefile 
     177index 277aa34..4c3106f 100644 
    172178--- a/arch/mips/lantiq/xway/Makefile 
    173179+++ b/arch/mips/lantiq/xway/Makefile 
    174180@@ -1,4 +1,4 @@ 
    175 -obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o nand.o 
    176 +obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o nand.o timer.o 
     181-obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o prom.o nand.o 
     182+obj-y := sysctrl.o reset.o gpio.o gpio_stp.o gpio_ebu.o devices.o dma.o clk.o prom.o nand.o timer.o 
    177183  
    178  obj-$(CONFIG_SOC_XWAY) += clk-xway.o prom-xway.o 
    179  obj-$(CONFIG_SOC_AMAZON_SE) += clk-ase.o prom-ase.o 
     184 obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o 
     185 obj-$(CONFIG_LANTIQ_MACH_EASY50601) += mach-easy50601.o 
     186diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c 
     187index 38f02f9..1a2e2d4 100644 
     188--- a/arch/mips/lantiq/xway/sysctrl.c 
     189+++ b/arch/mips/lantiq/xway/sysctrl.c 
     190@@ -147,6 +147,7 @@ void __init ltq_soc_init(void) 
     191        clkdev_add_pmu("ltq_dma", NULL, 0, PMU_DMA); 
     192        clkdev_add_pmu("ltq_stp", NULL, 0, PMU_STP); 
     193        clkdev_add_pmu("ltq_spi", NULL, 0, PMU_SPI); 
     194+        clkdev_add_pmu("ltq_gptu", NULL, 0, PMU_GPT); 
     195        if (!ltq_is_vr9()) 
     196                clkdev_add_pmu("ltq_etop", NULL, 0, PMU_PPE); 
     197        if (ltq_is_ase()) { 
     198diff --git a/arch/mips/lantiq/xway/timer.c b/arch/mips/lantiq/xway/timer.c 
     199new file mode 100644 
     200index 0000000..9794c87 
    180201--- /dev/null 
    181202+++ b/arch/mips/lantiq/xway/timer.c 
    182 @@ -0,0 +1,830 @@ 
     203@@ -0,0 +1,846 @@ 
    183204+#include <linux/kernel.h> 
    184205+#include <linux/module.h> 
     
    196217+#include <asm/irq.h> 
    197218+#include <asm/div64.h> 
     219+#include "../clk.h" 
    198220+ 
    199221+#include <lantiq_soc.h> 
     
    333355+}; 
    334356+ 
    335 +unsigned int ltq_get_fpi_bus_clock(int fpi); 
     357+unsigned long ltq_danube_fpi_bus_clock(int fpi); 
     358+unsigned long ltq_vr9_fpi_bus_clock(int fpi); 
     359+ 
     360+unsigned int ltq_get_fpi_bus_clock(int fpi) { 
     361+       if (ltq_is_ase()) 
     362+               return CLOCK_133M; 
     363+       else if (ltq_is_vr9()) 
     364+               return ltq_vr9_fpi_bus_clock(fpi); 
     365+ 
     366+       return ltq_danube_fpi_bus_clock(fpi); 
     367+} 
     368+ 
    336369+ 
    337370+static long gptu_ioctl(struct file *, unsigned int, unsigned long); 
     
    388421+static inline void lq_enable_gptu(void) 
    389422+{ 
    390 +       ltq_pmu_enable(PMU_GPT); 
     423+       struct clk *clk = clk_get_sys("ltq_gptu", NULL); 
     424+       clk_enable(clk); 
     425+ 
     426+       //ltq_pmu_enable(PMU_GPT); 
    391427+ 
    392428+       /*  Set divider as 1, disable write protection for SPEN, enable module. */ 
     
    403439+static inline void lq_disable_gptu(void) 
    404440+{ 
     441+       struct clk *clk = clk_get_sys("ltq_gptu", NULL); 
    405442+       ltq_w32(0x00, LQ_GPTU_IRNEN); 
    406443+       ltq_w32(0xfff, LQ_GPTU_IRNCR); 
     
    416453+               GPTU_CLC_DISR_SET(1); 
    417454+ 
    418 +       ltq_pmu_disable(PMU_GPT); 
     455+       clk_enable(clk); 
    419456+} 
    420457+ 
     
    10111048+module_init(lq_gptu_init); 
    10121049+module_exit(lq_gptu_exit); 
     1050--  
     10511.7.7.1 
     1052 
  • trunk/target/linux/lantiq/patches-3.2/0048-MIPS-lantiq-adds-dwc_otg.patch

    r31059 r31060  
    1 From ffd7924fcc69ff146d62f131d72ef18575bf0227 Mon Sep 17 00:00:00 2001 
     1From 668e5f88aa80ef8c4c8cb935c7c222146de79825 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Fri, 30 Sep 2011 14:37:36 +0200 
    4 Subject: [PATCH 18/24] MIPS: lantiq: adds dwc_otg 
     4Subject: [PATCH 48/70] MIPS: lantiq: adds dwc_otg 
    55 
    66--- 
     
    4646 create mode 100644 drivers/usb/dwc_otg/dwc_otg_regs.h 
    4747 
     48diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig 
     49index 791f11b..1eafa7a 100644 
    4850--- a/drivers/usb/Kconfig 
    4951+++ b/drivers/usb/Kconfig 
    50 @@ -116,6 +116,8 @@ source "drivers/usb/wusbcore/Kconfig" 
     52@@ -129,6 +129,8 @@ source "drivers/usb/wusbcore/Kconfig" 
    5153  
    5254 source "drivers/usb/host/Kconfig" 
     
    5759  
    5860 source "drivers/usb/renesas_usbhs/Kconfig" 
     61diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile 
     62index 75eca76..7fe8e83 100644 
    5963--- a/drivers/usb/Makefile 
    6064+++ b/drivers/usb/Makefile 
    61 @@ -28,6 +28,8 @@ obj-$(CONFIG_USB_C67X00_HCD)  += c67x00/ 
     65@@ -30,6 +30,8 @@ obj-$(CONFIG_USB_C67X00_HCD)  += c67x00/ 
    6266  
    6367 obj-$(CONFIG_USB_WUSB)         += wusbcore/ 
     
    6872 obj-$(CONFIG_USB_PRINTER)      += class/ 
    6973 obj-$(CONFIG_USB_WDM)          += class/ 
     74diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c 
     75index 7978146..6a7df52 100644 
    7076--- a/drivers/usb/core/hub.c 
    7177+++ b/drivers/usb/core/hub.c 
    72 @@ -2891,11 +2891,11 @@ hub_port_init (struct usb_hub *hub, stru 
     78@@ -2935,11 +2935,11 @@ hub_port_init (struct usb_hub *hub, struct usb_device *udev, int port1, 
    7379                udev->ttport = hdev->ttport; 
    7480        } else if (udev->speed != USB_SPEED_HIGH 
     
    8490                udev->ttport = port1; 
    8591        } 
     92diff --git a/drivers/usb/dwc_otg/Kconfig b/drivers/usb/dwc_otg/Kconfig 
     93new file mode 100644 
     94index 0000000..e018490 
    8695--- /dev/null 
    8796+++ b/drivers/usb/dwc_otg/Kconfig 
     
    124133+        bool "Enable debug mode" 
    125134+        depends on DWC_OTG 
     135diff --git a/drivers/usb/dwc_otg/Makefile b/drivers/usb/dwc_otg/Makefile 
     136new file mode 100644 
     137index 0000000..d4d2355 
    126138--- /dev/null 
    127139+++ b/drivers/usb/dwc_otg/Makefile 
     
    166178+#obj-$(CONFIG_DWC_OTG_IFX)     := dwc_otg_ifx.o 
    167179+#dwc_otg_ifx-objs              := dwc_otg_ifx.o 
     180diff --git a/drivers/usb/dwc_otg/dwc_otg_attr.c b/drivers/usb/dwc_otg/dwc_otg_attr.c 
     181new file mode 100644 
     182index 0000000..4675a5c 
    168183--- /dev/null 
    169184+++ b/drivers/usb/dwc_otg/dwc_otg_attr.c 
     
    971986+       device_remove_file(_dev, &dev_attr_wr_reg_test); 
    972987+} 
     988diff --git a/drivers/usb/dwc_otg/dwc_otg_attr.h b/drivers/usb/dwc_otg/dwc_otg_attr.h 
     989new file mode 100644 
     990index 0000000..4bbf7df 
    973991--- /dev/null 
    974992+++ b/drivers/usb/dwc_otg/dwc_otg_attr.h 
     
    10411059+ 
    10421060+#endif 
     1061diff --git a/drivers/usb/dwc_otg/dwc_otg_cil.c b/drivers/usb/dwc_otg/dwc_otg_cil.c 
     1062new file mode 100644 
     1063index 0000000..42c69eb 
    10431064--- /dev/null 
    10441065+++ b/drivers/usb/dwc_otg/dwc_otg_cil.c 
     
    40694090+} 
    40704091+ 
     4092diff --git a/drivers/usb/dwc_otg/dwc_otg_cil.h b/drivers/usb/dwc_otg/dwc_otg_cil.h 
     4093new file mode 100644 
     4094index 0000000..bbb9516 
    40714095--- /dev/null 
    40724096+++ b/drivers/usb/dwc_otg/dwc_otg_cil.h 
     
    49835007+ 
    49845008+#endif 
     5009diff --git a/drivers/usb/dwc_otg/dwc_otg_cil_ifx.h b/drivers/usb/dwc_otg/dwc_otg_cil_ifx.h 
     5010new file mode 100644 
     5011index 0000000..b0298ec 
    49855012--- /dev/null 
    49865013+++ b/drivers/usb/dwc_otg/dwc_otg_cil_ifx.h 
     
    50445071+#endif // __DWC_OTG_CIL_IFX_H__ 
    50455072+ 
     5073diff --git a/drivers/usb/dwc_otg/dwc_otg_cil_intr.c b/drivers/usb/dwc_otg/dwc_otg_cil_intr.c 
     5074new file mode 100644 
     5075index 0000000..d469ab4 
    50465076--- /dev/null 
    50475077+++ b/drivers/usb/dwc_otg/dwc_otg_cil_intr.c 
     
    57555785+        return retval; 
    57565786+} 
     5787diff --git a/drivers/usb/dwc_otg/dwc_otg_driver.c b/drivers/usb/dwc_otg/dwc_otg_driver.c 
     5788new file mode 100644 
     5789index 0000000..1b0daab 
    57575790--- /dev/null 
    57585791+++ b/drivers/usb/dwc_otg/dwc_otg_driver.c 
     
    70327065+ 
    70337066+*/ 
     7067diff --git a/drivers/usb/dwc_otg/dwc_otg_driver.h b/drivers/usb/dwc_otg/dwc_otg_driver.h 
     7068new file mode 100644 
     7069index 0000000..7e6940d 
    70347070--- /dev/null 
    70357071+++ b/drivers/usb/dwc_otg/dwc_otg_driver.h 
     
    71197155+ 
    71207156+#endif 
     7157diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd.c b/drivers/usb/dwc_otg/dwc_otg_hcd.c 
     7158new file mode 100644 
     7159index 0000000..ad6bc72 
    71217160--- /dev/null 
    71227161+++ b/drivers/usb/dwc_otg/dwc_otg_hcd.c 
     
    999210031+} 
    999310032+#endif /* DWC_DEVICE_ONLY */ 
     10033diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd.h b/drivers/usb/dwc_otg/dwc_otg_hcd.h 
     10034new file mode 100644 
     10035index 0000000..8a20dff 
    999410036--- /dev/null 
    999510037+++ b/drivers/usb/dwc_otg/dwc_otg_hcd.h 
     
    1067110713+#endif // __DWC_HCD_H__ 
    1067210714+#endif /* DWC_DEVICE_ONLY */ 
     10715diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c 
     10716new file mode 100644 
     10717index 0000000..834b5e0 
    1067310718--- /dev/null 
    1067410719+++ b/drivers/usb/dwc_otg/dwc_otg_hcd_intr.c 
     
    1251512560+ 
    1251612561+#endif /* DWC_DEVICE_ONLY */ 
     12562diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd_queue.c b/drivers/usb/dwc_otg/dwc_otg_hcd_queue.c 
     12563new file mode 100644 
     12564index 0000000..fcb5ce6 
    1251712565--- /dev/null 
    1251812566+++ b/drivers/usb/dwc_otg/dwc_otg_hcd_queue.c 
     
    1331213360+ 
    1331313361+#endif /* DWC_DEVICE_ONLY */ 
     13362diff --git a/drivers/usb/dwc_otg/dwc_otg_ifx.c b/drivers/usb/dwc_otg/dwc_otg_ifx.c 
     13363new file mode 100644 
     13364index 0000000..0a4c209 
    1331413365--- /dev/null 
    1331513366+++ b/drivers/usb/dwc_otg/dwc_otg_ifx.c 
     
    1341513466+{ 
    1341613467+} 
     13468diff --git a/drivers/usb/dwc_otg/dwc_otg_ifx.h b/drivers/usb/dwc_otg/dwc_otg_ifx.h 
     13469new file mode 100644 
     13470index 0000000..402d7a6 
    1341713471--- /dev/null 
    1341813472+++ b/drivers/usb/dwc_otg/dwc_otg_ifx.h 
     
    1350313557+} 
    1350413558+#endif //__DWC_OTG_IFX_H__ 
     13559diff --git a/drivers/usb/dwc_otg/dwc_otg_plat.h b/drivers/usb/dwc_otg/dwc_otg_plat.h 
     13560new file mode 100644 
     13561index 0000000..727d0c4 
    1350513562--- /dev/null 
    1350613563+++ b/drivers/usb/dwc_otg/dwc_otg_plat.h 
     
    1377513832+#endif 
    1377613833+ 
     13834diff --git a/drivers/usb/dwc_otg/dwc_otg_regs.h b/drivers/usb/dwc_otg/dwc_otg_regs.h 
     13835new file mode 100644 
     13836index 0000000..397a954 
    1377713837--- /dev/null 
    1377813838+++ b/drivers/usb/dwc_otg/dwc_otg_regs.h 
     
    1557515635+ 
    1557615636+#endif 
     15637--  
     156381.7.7.1 
     15639 
  • trunk/target/linux/lantiq/patches-3.2/0056-MIPS-lantiq-make-GPIO3-work-on-AR9.patch

    r31059 r31060  
    1 From 92b24777385cd8388e0fa8b9f1d24e5bc4466641 Mon Sep 17 00:00:00 2001 
     1From b11a96f2bdf1730fe3fd3be1d0667e20a4eb5bff Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Sat, 13 Aug 2011 13:59:50 +0200 
    4 Subject: [PATCH 12/22] MIPS: lantiq: make GPIO3 work on AR9 
     4Subject: [PATCH 56/70] MIPS: lantiq: make GPIO3 work on AR9 
    55 
    66There are 3 16bit and 1 8bit gpio ports on AR9. The gpio driver needs a hack 
     
    1414 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    2 + 
    1515 arch/mips/lantiq/xway/devices.c                    |    3 + 
    16  arch/mips/lantiq/xway/gpio.c                       |   62 ++++++++++++++++---- 
     16 arch/mips/lantiq/xway/gpio.c                       |   84 ++++++++++++++++---- 
    1717 arch/mips/lantiq/xway/gpio_ebu.c                   |    3 +- 
    1818 arch/mips/lantiq/xway/gpio_stp.c                   |    3 +- 
    19  5 files changed, 57 insertions(+), 16 deletions(-) 
    20  
     19 5 files changed, 75 insertions(+), 20 deletions(-) 
     20 
     21diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
     22index d1b8cc8..bfdeb16 100644 
    2123--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    2224+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h 
    23 @@ -121,7 +121,9 @@ 
     25@@ -126,7 +126,9 @@ 
    2426 #define LTQ_GPIO0_BASE_ADDR    0x1E100B10 
    2527 #define LTQ_GPIO1_BASE_ADDR    0x1E100B40 
     
    3133 /* SSC */ 
    3234 #define LTQ_SSC_BASE_ADDR      0x1e100800 
     35diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c 
     36index 5efa4f3..e6d45bc 100644 
    3337--- a/arch/mips/lantiq/xway/devices.c 
    3438+++ b/arch/mips/lantiq/xway/devices.c 
    35 @@ -34,6 +34,7 @@ static struct resource ltq_gpio_resource 
     39@@ -34,6 +34,7 @@ static struct resource ltq_gpio_resource[] = { 
    3640        MEM_RES("gpio0", LTQ_GPIO0_BASE_ADDR, LTQ_GPIO_SIZE), 
    3741        MEM_RES("gpio1", LTQ_GPIO1_BASE_ADDR, LTQ_GPIO_SIZE), 
     
    5054 } 
    5155  
     56diff --git a/arch/mips/lantiq/xway/gpio.c b/arch/mips/lantiq/xway/gpio.c 
     57index 54ec6c9..375329b 100644 
    5258--- a/arch/mips/lantiq/xway/gpio.c 
    5359+++ b/arch/mips/lantiq/xway/gpio.c 
    54 @@ -23,9 +23,15 @@ 
     60@@ -23,9 +23,17 @@ 
    5561 #define LTQ_GPIO_OD            0x14 
    5662 #define LTQ_GPIO_PUDSEL                0x1C 
     
    5864+#define LTQ_GPIO3_OD           0x24 
    5965+#define LTQ_GPIO3_ALTSEL1      0x24 
     66+#define LTQ_GPIO3_PUDSEL       0x28 
     67+#define LTQ_GPIO3_PUDEN                0x2C 
    6068  
    6169+/* PORT3 only has 8 pins and its register layout 
     
    6977 #define ltq_gpio_getbit(m, r, p)       (!!(ltq_r32(m + r) & (1 << p))) 
    7078 #define ltq_gpio_setbit(m, r, p)       ltq_w32_mask(0, (1 << p), m + r) 
    71 @@ -55,7 +61,7 @@ int ltq_gpio_request(unsigned int pin, u 
     79@@ -55,7 +63,7 @@ int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux, 
    7280 { 
    7381        int id = 0; 
     
    7684+       if (pin >= MAX_PIN) 
    7785                return -EINVAL; 
    78         if (gpio_request(pin, name)) { 
     86        if (devm_gpio_request(dev, pin, name)) { 
    7987                pr_err("failed to setup lantiq gpio: %s\n", name); 
    80 @@ -75,12 +81,21 @@ int ltq_gpio_request(unsigned int pin, u 
     88@@ -75,12 +83,21 @@ int ltq_gpio_request(struct device *dev, unsigned int pin, unsigned int mux, 
    8189        else 
    8290                ltq_gpio_clearbit(ltq_gpio_port[id].membase, 
    8391                        LTQ_GPIO_ALTSEL0, pin); 
    84 -       if (alt1) 
     92-       if (mux & 0x1) 
    8593-               ltq_gpio_setbit(ltq_gpio_port[id].membase, 
    8694-                       LTQ_GPIO_ALTSEL1, pin); 
     
    8997-                       LTQ_GPIO_ALTSEL1, pin); 
    9098+       if (id == 3) { 
    91 +               if (alt1) 
     99+               if (mux & 0x1) 
    92100+                       ltq_gpio_setbit(ltq_gpio_port[1].membase, 
    93101+                               LTQ_GPIO3_ALTSEL1, pin); 
     
    96104+                               LTQ_GPIO3_ALTSEL1, pin); 
    97105+       } else { 
    98 +               if (alt1) 
     106+               if (mux & 0x1) 
    99107+                       ltq_gpio_setbit(ltq_gpio_port[id].membase, 
    100108+                               LTQ_GPIO_ALTSEL1, pin); 
     
    106114 } 
    107115 EXPORT_SYMBOL(ltq_gpio_request); 
    108 @@ -106,7 +121,11 @@ static int ltq_gpio_direction_input(stru 
     116@@ -106,10 +123,19 @@ static int ltq_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) 
    109117 { 
    110118        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip); 
    111119  
    112120-       ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); 
    113 +       if (chip->ngpio == PINS_PORT3) 
     121+       if (chip->ngpio == PINS_PORT3) { 
    114122+               ltq_gpio_clearbit(ltq_gpio_port[0].membase, 
    115123+                               LTQ_GPIO3_OD, offset); 
    116 +       else 
     124+               ltq_gpio_setbit(ltq_gpio_port[0].membase, 
     125+                               LTQ_GPIO3_PUDSEL, offset); 
     126+               ltq_gpio_setbit(ltq_gpio_port[0].membase, 
     127+                               LTQ_GPIO3_PUDEN, offset); 
     128+       } else { 
    117129+               ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); 
     130+               ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); 
     131+               ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); 
     132+       } 
    118133        ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset); 
    119         ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); 
    120         ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); 
    121 @@ -119,7 +138,10 @@ static int ltq_gpio_direction_output(str 
     134-       ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); 
     135-       ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); 
     136  
     137        return 0; 
     138 } 
     139@@ -119,10 +145,19 @@ static int ltq_gpio_direction_output(struct gpio_chip *chip, 
    122140 { 
    123141        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip); 
    124142  
    125143-       ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); 
    126 +       if (chip->ngpio == PINS_PORT3) 
    127 +               ltq_gpio_setbit(ltq_gpio_port[0].membase, LTQ_GPIO3_OD, offset); 
    128 +       else 
     144+       if (chip->ngpio == PINS_PORT3) { 
     145+               ltq_gpio_setbit(ltq_gpio_port[0].membase, 
     146+                               LTQ_GPIO3_OD, offset); 
     147+               ltq_gpio_clearbit(ltq_gpio_port[0].membase, 
     148+                               LTQ_GPIO3_PUDSEL, offset); 
     149+               ltq_gpio_clearbit(ltq_gpio_port[0].membase, 
     150+                               LTQ_GPIO3_PUDEN, offset); 
     151+       } else { 
    129152+               ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_OD, offset); 
     153+               ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); 
     154+               ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); 
     155+       } 
    130156        ltq_gpio_setbit(ltq_gpio->membase, LTQ_GPIO_DIR, offset); 
    131         ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); 
    132         ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); 
    133 @@ -133,7 +155,11 @@ static int ltq_gpio_req(struct gpio_chip 
     157-       ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDSEL, offset); 
     158-       ltq_gpio_clearbit(ltq_gpio->membase, LTQ_GPIO_PUDEN, offset); 
     159        ltq_gpio_set(chip, offset, value); 
     160  
     161        return 0; 
     162@@ -133,7 +168,11 @@ static int ltq_gpio_req(struct gpio_chip *chip, unsigned offset) 
    134163        struct ltq_gpio *ltq_gpio = container_of(chip, struct ltq_gpio, chip); 
    135164  
     
    144173 } 
    145174  
    146 @@ -146,6 +172,15 @@ static int ltq_gpio_probe(struct platfor 
     175@@ -146,6 +185,16 @@ static int ltq_gpio_probe(struct platform_device *pdev) 
    147176                        pdev->id); 
    148177                return -EINVAL; 
     
    151180+       /* dirty hack - The registers of port3 are not mapped linearly. 
    152181+          Port 3 may only load if Port 1/2 are mapped */ 
    153 +       if ((pdev->id == 3) && (!ltq_gpio_port[1].membase || !ltq_gpio_port[2].membase)) { 
     182+       if ((pdev->id == 3) && (!ltq_gpio_port[1].membase 
     183+                                       || !ltq_gpio_port[2].membase)) { 
    154184+               dev_err(&pdev->dev, 
    155185+                       "ports 1/2 need to be loaded before port 3 works\n"); 
     
    160190        if (!res) { 
    161191                dev_err(&pdev->dev, "failed to get memory for gpio port %d\n", 
    162 @@ -175,7 +210,10 @@ static int ltq_gpio_probe(struct platfor 
     192@@ -175,7 +224,10 @@ static int ltq_gpio_probe(struct platform_device *pdev) 
    163193        ltq_gpio_port[pdev->id].chip.set = ltq_gpio_set; 
    164194        ltq_gpio_port[pdev->id].chip.request = ltq_gpio_req; 
     
    172202        return gpiochip_add(&ltq_gpio_port[pdev->id].chip); 
    173203 } 
     204diff --git a/arch/mips/lantiq/xway/gpio_ebu.c b/arch/mips/lantiq/xway/gpio_ebu.c 
     205index b91c7f1..bc5696b 100644 
    174206--- a/arch/mips/lantiq/xway/gpio_ebu.c 
    175207+++ b/arch/mips/lantiq/xway/gpio_ebu.c 
     
    185217 }; 
    186218  
     219diff --git a/arch/mips/lantiq/xway/gpio_stp.c b/arch/mips/lantiq/xway/gpio_stp.c 
     220index da91c5e..9610c10 100644 
    187221--- a/arch/mips/lantiq/xway/gpio_stp.c 
    188222+++ b/arch/mips/lantiq/xway/gpio_stp.c 
    189 @@ -72,9 +72,8 @@ static struct gpio_chip ltq_stp_chip = { 
     223@@ -74,9 +74,8 @@ static struct gpio_chip ltq_stp_chip = { 
    190224        .label = "ltq_stp", 
    191225        .direction_output = ltq_stp_direction_output, 
     
    198232 }; 
    199233  
     234--  
     2351.7.7.1 
     236 
  • trunk/target/linux/lantiq/patches-3.2/0057-MIPS-lantiq-VPE-extensions.patch

    r31059 r31060  
    1 From c6c810d83f0d95f54c3a6b338d219cec7ccef4c9 Mon Sep 17 00:00:00 2001 
     1From 587ca6b21ab64ab014625b1cacb36ef711c74962 Mon Sep 17 00:00:00 2001 
    22From: John Crispin <blogic@openwrt.org> 
    33Date: Thu, 29 Sep 2011 2