Changeset 30889


Ignore:
Timestamp:
2012-03-11T20:05:57+01:00 (6 years ago)
Author:
juhosg
Message:

ramips: rt305x: rename SYSTEM_CONFIG_* defines to RT305X_SYSCFG_*

Location:
trunk/target/linux/ramips/files/arch/mips
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h

    r27809 r30889  
    6262#define CHIP_ID_REV_MASK        0xff 
    6363 
    64 #define SYSTEM_CONFIG_CPUCLK_SHIFT      18 
    65 #define SYSTEM_CONFIG_CPUCLK_MASK       0x1 
    66 #define SYSTEM_CONFIG_CPUCLK_320        0x0 
    67 #define SYSTEM_CONFIG_CPUCLK_384        0x1 
    68 #define SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT       2 
    69 #define SYSTEM_CONFIG_SRAM_CS0_MODE_MASK        0x3 
    70 #define SYSTEM_CONFIG_SRAM_CS0_MODE_NORMAL      0 
    71 #define SYSTEM_CONFIG_SRAM_CS0_MODE_WDT         1 
    72 #define SYSTEM_CONFIG_SRAM_CS0_MODE_BTCOEX      2 
     64#define RT305X_SYSCFG_CPUCLK_SHIFT      18 
     65#define RT305X_SYSCFG_CPUCLK_MASK       0x1 
     66#define RT305X_SYSCFG_CPUCLK_LOW        0x0 
     67#define RT305X_SYSCFG_CPUCLK_HIGH       0x1 
     68#define RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT       2 
     69#define RT305X_SYSCFG_SRAM_CS0_MODE_MASK        0x3 
     70#define RT305X_SYSCFG_SRAM_CS0_MODE_NORMAL      0 
     71#define RT305X_SYSCFG_SRAM_CS0_MODE_WDT         1 
     72#define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX      2 
    7373 
    7474#define RT305X_GPIO_MODE_I2C            BIT(0) 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt305x/clock.c

    r25124 r30889  
    3434 
    3535        t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG); 
    36         t = ((t >> SYSTEM_CONFIG_CPUCLK_SHIFT) & SYSTEM_CONFIG_CPUCLK_MASK); 
     36        t = ((t >> RT305X_SYSCFG_CPUCLK_SHIFT) & RT305X_SYSCFG_CPUCLK_MASK); 
    3737 
    3838        switch (t) { 
    39         case SYSTEM_CONFIG_CPUCLK_320: 
     39        case RT305X_SYSCFG_CPUCLK_LOW: 
    4040                rt305x_cpu_clk.rate = 320000000; 
    4141                break; 
    42         case SYSTEM_CONFIG_CPUCLK_384: 
     42        case RT305X_SYSCFG_CPUCLK_HIGH: 
    4343                rt305x_cpu_clk.rate = 384000000; 
    4444                break; 
  • trunk/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c

    r30473 r30889  
    230230        /* enable WDT reset output on pin SRAM_CS_N */ 
    231231        t = rt305x_sysc_rr(SYSC_REG_SYSTEM_CONFIG); 
    232         t |= SYSTEM_CONFIG_SRAM_CS0_MODE_WDT << 
    233              SYSTEM_CONFIG_SRAM_CS0_MODE_SHIFT; 
     232        t |= RT305X_SYSCFG_SRAM_CS0_MODE_WDT << 
     233             RT305X_SYSCFG_SRAM_CS0_MODE_SHIFT; 
    234234        rt305x_sysc_wr(t, SYSC_REG_SYSTEM_CONFIG); 
    235235 
Note: See TracChangeset for help on using the changeset viewer.