Changeset 21939

Timestamp:

2010-06-26T21:54:11+02:00 (8 years ago)

Author:

juhosg

Message:

backfire: generic: rtl8366: add hw_init to initialize registers after reset (backport of r21920)

Location:

branches/backfire/target/linux/generic-2.6/files/drivers/net/phy

Files:

• rtl8366rb.c (modified) (5 diffs)
• rtl8366s.c (modified) (5 diffs)

branches/backfire/target/linux/generic-2.6/files/drivers/net/phy/rtl8366rb.c

@@ -35 +35 @@
 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
 #define RTL8366_CHIP_CTRL_VLAN_4KTB         (1 << 14)
+
+/* Switch Global Configuration register */
+#define RTL8366_SGCR                    0x0000
+#define RTL8366_SGCR_EN_BC_STORM_CTRL   BIT(0)
+#define RTL8366_SGCR_MAX_LENGTH(_x)     (_x << 4)
+#define RTL8366_SGCR_MAX_LENGTH_MASK    RTL8366_SGCR_MAX_LENGTH(0x3)
+#define RTL8366_SGCR_MAX_LENGTH_1522    RTL8366_SGCR_MAX_LENGTH(0x0)
+#define RTL8366_SGCR_MAX_LENGTH_1536    RTL8366_SGCR_MAX_LENGTH(0x1)
+#define RTL8366_SGCR_MAX_LENGTH_1552    RTL8366_SGCR_MAX_LENGTH(0x2)
+#define RTL8366_SGCR_MAX_LENGTH_9216    RTL8366_SGCR_MAX_LENGTH(0x3)
+
+/* Port Enable Control register */
+#define RTL8366_PECR                    0x0001
+
+/* Switch Security Control registers */
+#define RTL8366_SSCR0                   0x0002
+#define RTL8366_SSCR1                   0x0003
+#define RTL8366_SSCR2                   0x0004
+#define RTL8366_SSCR2_DROP_UNKNOWN_DA   BIT(0)
 
 #define RTL8366_RESET_CTRL_REG              0x0100
@@ -222 +241 @@
 };
 
+#define REG_WR(_smi, _reg, _val)                                        \
+        do {                                                            \
+                err = rtl8366_smi_write_reg(_smi, _reg, _val);          \
+                if (err)                                                \
+                        return err;                                     \
+        } while (0)
+
+#define REG_RMW(_smi, _reg, _mask, _val)                                \
+        do {                                                            \
+                err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);        \
+                if (err)                                                \
+                        return err;                                     \
+        } while (0)
+
 static inline struct rtl8366rb *smi_to_rtl8366rb(struct rtl8366_smi *smi)
 {
@@ -258 +291 @@
                 return -EIO;
         }
+
+        return 0;
+}
+
+static int rtl8366rb_hw_init(struct rtl8366_smi *smi)
+{
+        int err;
+
+        /* set maximum packet length to 1536 bytes */
+        REG_RMW(smi, RTL8366_SGCR, RTL8366_SGCR_MAX_LENGTH_MASK,
+                RTL8366_SGCR_MAX_LENGTH_1536);
+
+        /* enable all ports */
+        REG_WR(smi, RTL8366_PECR, 0);
+
+        /* disable learning for all ports */
+        REG_WR(smi, RTL8366_SSCR0, RTL8366_PORT_ALL);
+
+        /* disable auto ageing for all ports */
+        REG_WR(smi, RTL8366_SSCR1, RTL8366_PORT_ALL);
+
+        /* don't drop packets whose DA has not been learned */
+        REG_RMW(smi, RTL8366_SSCR2, RTL8366_SSCR2_DROP_UNKNOWN_DA, 0);
 
         return 0;
@@ -1337 +1393 @@
 
         err = rtl8366rb_reset_chip(smi);
+        if (err)
+                return err;
+
+        err = rtl8366rb_hw_init(smi);
         if (err)
                 return err;
@@ -1505 +1565 @@
         int ret;
 
+        rtl8366rb_debugfs_init(rtl);
+
         ret = rtl8366rb_reset_chip(smi);
         if (ret)
                 return ret;
 
-        rtl8366rb_debugfs_init(rtl);
-        return 0;
+        ret = rtl8366rb_hw_init(smi);
+        return ret;
 }
 

branches/backfire/target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c

@@ -34 +34 @@
 #define RTL8366_CHIP_GLOBAL_CTRL_REG        0x0000
 #define RTL8366_CHIP_CTRL_VLAN              (1 << 13)
+
+/* Switch Global Configuration register */
+#define RTL8366_SGCR                    0x0000
+#define RTL8366_SGCR_EN_BC_STORM_CTRL   BIT(0)
+#define RTL8366_SGCR_MAX_LENGTH(_x)     (_x << 4)
+#define RTL8366_SGCR_MAX_LENGTH_MASK    RTL8366_SGCR_MAX_LENGTH(0x3)
+#define RTL8366_SGCR_MAX_LENGTH_1522    RTL8366_SGCR_MAX_LENGTH(0x0)
+#define RTL8366_SGCR_MAX_LENGTH_1536    RTL8366_SGCR_MAX_LENGTH(0x1)
+#define RTL8366_SGCR_MAX_LENGTH_1552    RTL8366_SGCR_MAX_LENGTH(0x2)
+#define RTL8366_SGCR_MAX_LENGTH_16000   RTL8366_SGCR_MAX_LENGTH(0x3)
+
+/* Port Enable Control register */
+#define RTL8366_PECR                    0x0001
+
+/* Switch Security Control registers */
+#define RTL8366_SSCR0                   0x0002
+#define RTL8366_SSCR1                   0x0003
+#define RTL8366_SSCR2                   0x0004
+#define RTL8366_SSCR2_DROP_UNKNOWN_DA   BIT(0)
 
 #define RTL8366_RESET_CTRL_REG              0x0100
@@ -231 +250 @@
 };
 
+#define REG_WR(_smi, _reg, _val)                                        \
+        do {                                                            \
+                err = rtl8366_smi_write_reg(_smi, _reg, _val);          \
+                if (err)                                                \
+                        return err;                                     \
+        } while (0)
+
+#define REG_RMW(_smi, _reg, _mask, _val)                                \
+        do {                                                            \
+                err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val);        \
+                if (err)                                                \
+                        return err;                                     \
+        } while (0)
+
 static inline struct rtl8366s *smi_to_rtl8366s(struct rtl8366_smi *smi)
 {
@@ -267 +300 @@
                 return -EIO;
         }
+
+        return 0;
+}
+
+static int rtl8366s_hw_init(struct rtl8366_smi *smi)
+{
+        int err;
+
+        /* set maximum packet length to 1536 bytes */
+        REG_RMW(smi, RTL8366_SGCR, RTL8366_SGCR_MAX_LENGTH_MASK,
+                RTL8366_SGCR_MAX_LENGTH_1536);
+
+        /* enable all ports */
+        REG_WR(smi, RTL8366_PECR, 0);
+
+        /* disable learning for all ports */
+        REG_WR(smi, RTL8366_SSCR0, RTL8366_PORT_ALL);
+
+        /* disable auto ageing for all ports */
+        REG_WR(smi, RTL8366_SSCR1, RTL8366_PORT_ALL);
+
+        /* don't drop packets whose DA has not been learned */
+        REG_RMW(smi, RTL8366_SSCR2, RTL8366_SSCR2_DROP_UNKNOWN_DA, 0);
 
         return 0;
@@ -1325 +1381 @@
 
         err = rtl8366s_reset_chip(smi);
+        if (err)
+                return err;
+
+        err = rtl8366s_hw_init(smi);
         if (err)
                 return err;
@@ -1493 +1553 @@
         int ret;
 
+        rtl8366s_debugfs_init(rtl);
+
         ret = rtl8366s_reset_chip(smi);
         if (ret)
                 return ret;
 
-        rtl8366s_debugfs_init(rtl);
-        return 0;
+        ret = rtl8366s_hw_init(smi);
+        return ret;
 }