Changeset 21939
- Timestamp:
- 2010-06-26T21:54:11+02:00 (8 years ago)
- Location:
- branches/backfire/target/linux/generic-2.6/files/drivers/net/phy
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/backfire/target/linux/generic-2.6/files/drivers/net/phy/rtl8366rb.c
r21938 r21939 35 35 #define RTL8366_CHIP_CTRL_VLAN (1 << 13) 36 36 #define RTL8366_CHIP_CTRL_VLAN_4KTB (1 << 14) 37 38 /* Switch Global Configuration register */ 39 #define RTL8366_SGCR 0x0000 40 #define RTL8366_SGCR_EN_BC_STORM_CTRL BIT(0) 41 #define RTL8366_SGCR_MAX_LENGTH(_x) (_x << 4) 42 #define RTL8366_SGCR_MAX_LENGTH_MASK RTL8366_SGCR_MAX_LENGTH(0x3) 43 #define RTL8366_SGCR_MAX_LENGTH_1522 RTL8366_SGCR_MAX_LENGTH(0x0) 44 #define RTL8366_SGCR_MAX_LENGTH_1536 RTL8366_SGCR_MAX_LENGTH(0x1) 45 #define RTL8366_SGCR_MAX_LENGTH_1552 RTL8366_SGCR_MAX_LENGTH(0x2) 46 #define RTL8366_SGCR_MAX_LENGTH_9216 RTL8366_SGCR_MAX_LENGTH(0x3) 47 48 /* Port Enable Control register */ 49 #define RTL8366_PECR 0x0001 50 51 /* Switch Security Control registers */ 52 #define RTL8366_SSCR0 0x0002 53 #define RTL8366_SSCR1 0x0003 54 #define RTL8366_SSCR2 0x0004 55 #define RTL8366_SSCR2_DROP_UNKNOWN_DA BIT(0) 37 56 38 57 #define RTL8366_RESET_CTRL_REG 0x0100 … … 222 241 }; 223 242 243 #define REG_WR(_smi, _reg, _val) \ 244 do { \ 245 err = rtl8366_smi_write_reg(_smi, _reg, _val); \ 246 if (err) \ 247 return err; \ 248 } while (0) 249 250 #define REG_RMW(_smi, _reg, _mask, _val) \ 251 do { \ 252 err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val); \ 253 if (err) \ 254 return err; \ 255 } while (0) 256 224 257 static inline struct rtl8366rb *smi_to_rtl8366rb(struct rtl8366_smi *smi) 225 258 { … … 258 291 return -EIO; 259 292 } 293 294 return 0; 295 } 296 297 static int rtl8366rb_hw_init(struct rtl8366_smi *smi) 298 { 299 int err; 300 301 /* set maximum packet length to 1536 bytes */ 302 REG_RMW(smi, RTL8366_SGCR, RTL8366_SGCR_MAX_LENGTH_MASK, 303 RTL8366_SGCR_MAX_LENGTH_1536); 304 305 /* enable all ports */ 306 REG_WR(smi, RTL8366_PECR, 0); 307 308 /* disable learning for all ports */ 309 REG_WR(smi, RTL8366_SSCR0, RTL8366_PORT_ALL); 310 311 /* disable auto ageing for all ports */ 312 REG_WR(smi, RTL8366_SSCR1, RTL8366_PORT_ALL); 313 314 /* don't drop packets whose DA has not been learned */ 315 REG_RMW(smi, RTL8366_SSCR2, RTL8366_SSCR2_DROP_UNKNOWN_DA, 0); 260 316 261 317 return 0; … … 1337 1393 1338 1394 err = rtl8366rb_reset_chip(smi); 1395 if (err) 1396 return err; 1397 1398 err = rtl8366rb_hw_init(smi); 1339 1399 if (err) 1340 1400 return err; … … 1505 1565 int ret; 1506 1566 1567 rtl8366rb_debugfs_init(rtl); 1568 1507 1569 ret = rtl8366rb_reset_chip(smi); 1508 1570 if (ret) 1509 1571 return ret; 1510 1572 1511 r tl8366rb_debugfs_init(rtl);1512 return 0;1573 ret = rtl8366rb_hw_init(smi); 1574 return ret; 1513 1575 } 1514 1576 -
branches/backfire/target/linux/generic-2.6/files/drivers/net/phy/rtl8366s.c
r21938 r21939 34 34 #define RTL8366_CHIP_GLOBAL_CTRL_REG 0x0000 35 35 #define RTL8366_CHIP_CTRL_VLAN (1 << 13) 36 37 /* Switch Global Configuration register */ 38 #define RTL8366_SGCR 0x0000 39 #define RTL8366_SGCR_EN_BC_STORM_CTRL BIT(0) 40 #define RTL8366_SGCR_MAX_LENGTH(_x) (_x << 4) 41 #define RTL8366_SGCR_MAX_LENGTH_MASK RTL8366_SGCR_MAX_LENGTH(0x3) 42 #define RTL8366_SGCR_MAX_LENGTH_1522 RTL8366_SGCR_MAX_LENGTH(0x0) 43 #define RTL8366_SGCR_MAX_LENGTH_1536 RTL8366_SGCR_MAX_LENGTH(0x1) 44 #define RTL8366_SGCR_MAX_LENGTH_1552 RTL8366_SGCR_MAX_LENGTH(0x2) 45 #define RTL8366_SGCR_MAX_LENGTH_16000 RTL8366_SGCR_MAX_LENGTH(0x3) 46 47 /* Port Enable Control register */ 48 #define RTL8366_PECR 0x0001 49 50 /* Switch Security Control registers */ 51 #define RTL8366_SSCR0 0x0002 52 #define RTL8366_SSCR1 0x0003 53 #define RTL8366_SSCR2 0x0004 54 #define RTL8366_SSCR2_DROP_UNKNOWN_DA BIT(0) 36 55 37 56 #define RTL8366_RESET_CTRL_REG 0x0100 … … 231 250 }; 232 251 252 #define REG_WR(_smi, _reg, _val) \ 253 do { \ 254 err = rtl8366_smi_write_reg(_smi, _reg, _val); \ 255 if (err) \ 256 return err; \ 257 } while (0) 258 259 #define REG_RMW(_smi, _reg, _mask, _val) \ 260 do { \ 261 err = rtl8366_smi_rmwr(_smi, _reg, _mask, _val); \ 262 if (err) \ 263 return err; \ 264 } while (0) 265 233 266 static inline struct rtl8366s *smi_to_rtl8366s(struct rtl8366_smi *smi) 234 267 { … … 267 300 return -EIO; 268 301 } 302 303 return 0; 304 } 305 306 static int rtl8366s_hw_init(struct rtl8366_smi *smi) 307 { 308 int err; 309 310 /* set maximum packet length to 1536 bytes */ 311 REG_RMW(smi, RTL8366_SGCR, RTL8366_SGCR_MAX_LENGTH_MASK, 312 RTL8366_SGCR_MAX_LENGTH_1536); 313 314 /* enable all ports */ 315 REG_WR(smi, RTL8366_PECR, 0); 316 317 /* disable learning for all ports */ 318 REG_WR(smi, RTL8366_SSCR0, RTL8366_PORT_ALL); 319 320 /* disable auto ageing for all ports */ 321 REG_WR(smi, RTL8366_SSCR1, RTL8366_PORT_ALL); 322 323 /* don't drop packets whose DA has not been learned */ 324 REG_RMW(smi, RTL8366_SSCR2, RTL8366_SSCR2_DROP_UNKNOWN_DA, 0); 269 325 270 326 return 0; … … 1325 1381 1326 1382 err = rtl8366s_reset_chip(smi); 1383 if (err) 1384 return err; 1385 1386 err = rtl8366s_hw_init(smi); 1327 1387 if (err) 1328 1388 return err; … … 1493 1553 int ret; 1494 1554 1555 rtl8366s_debugfs_init(rtl); 1556 1495 1557 ret = rtl8366s_reset_chip(smi); 1496 1558 if (ret) 1497 1559 return ret; 1498 1560 1499 r tl8366s_debugfs_init(rtl);1500 return 0;1561 ret = rtl8366s_hw_init(smi); 1562 return ret; 1501 1563 } 1502 1564
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